PIC16F627-20I/P Microchip Technology, PIC16F627-20I/P Datasheet - Page 46

IC MCU FLASH 1KX14 COMP 18DIP

PIC16F627-20I/P

Manufacturer Part Number
PIC16F627-20I/P
Description
IC MCU FLASH 1KX14 COMP 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheet

Specifications of PIC16F627-20I/P

Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
224 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
18-DIP (0.300", 7.62mm)
Controller Family/series
PIC16F
No. Of I/o's
16
Eeprom Memory Size
128Byte
Ram Memory Size
224Byte
Cpu Speed
20MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA16XP183 - ADAPTER ICE 18DIP/SOIC/SSOPAC164010 - MODULE SKT PROMATEII DIP/SOIC
Data Converters
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
PIC16F62X
6.3
An 8-bit counter is available as a prescaler for the
Timer0 module, or as a postscaler for the Watchdog
Timer. A prescaler assignment for the Timer0 module
means that there is no postscaler for the Watchdog
Timer, and vice-versa.
FIGURE 6-1:
DS40300C-page 44
WDT Enable bit
T0CKI
Watchdog
Pin
Note 1: T0SE, T0CS, PSA, PS0-PS2 are bits in the Option Register.
Timer
Timer0 Prescaler
F
OSC
/4
T0SE
BLOCK DIAGRAM OF THE TIMER0/WDT
0
1
PSA
.
T0CS
0
1
WDT Postscaler/
TMR0 Prescaler
0
Timeout
WDT
Preliminary
8-to-1MUX
8
1
1
0
PSA
The PSA and PS2:PS0 bits (OPTION<3:0>) determine
the prescaler assignment and prescale ratio.
When assigned to the Timer0 module, all instructions
writing
MOVWF 1, BSF 1, x....etc.) will clear the pres-
caler. When assigned to WDT, a CLRWDT instruction
will clear the prescaler along with the Watchdog Timer.
The prescaler is not readable or writable.
PSA
to
PS0 - PS2
Cycles
SYNC
2
the
TMR0
 2003 Microchip Technology Inc.
TMR0 reg
register
Data Bus
8
Set Flag Bit T0IF
(e.g.,
on Overflow
CLRF 1,

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