PIC24FJ32GA002-I/SS Microchip Technology, PIC24FJ32GA002-I/SS Datasheet - Page 12

• Manufacturer Part Number: PIC24FJ32GA002-I/SS
• Description: IC PIC MCU FLASH 32K 28-SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ32GA002-I/SS

• Program Memory Type: FLASH
• Program Memory Size: 32KB (11K x 24)
• Package / Case: 28-SSOP
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C/IrDA/SPI/UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240011, DM300027, DV164033, MA240013, AC164127, DM240002
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 10-bit
• Controller Family/series: PIC24
• No. Of I/o's: 21
• Ram Memory Size: 8KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Embedded Interface Type: I2C, SPI, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164338 - MOD SKT PIC24F/DSPIC33F 28SOICDV164033 - KIT START EXPLORER 16 MPLAB ICD2
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC24FJ64GA004 FAMILY
FIGURE 1-1:
DS39881C-page 10
Note 1:
OSCO/CLKO
OSCI/CLKI
DISVREG
2:
3:
Not all pins or features are implemented on all device pinout configurations. See Table 1-2 for I/O port pin descriptions.
BOR and LVD functionality is provided when the on-board voltage regulator is enabled.
Peripheral I/Os are accessible through remappable pins.
V
Control Block
PSV & Table
Data Access
DDCORE
Generation
FRC/LPRC
Band Gap
Reference
Oscillators
Regulator
Precision
Program Memory
Voltage
Timing
Address Latch
Data Latch
/V
PIC24FJ64GA004 FAMILY GENERAL BLOCK DIAGRAM
IC1-5
Timer1
CAP
23
(3)
Controller
Interrupt
V
DD
23
Start-up Timer
,
Timer2/3
V
Watchdog
Instruction
Power-up
Power-on
Decode &
Oscillator
BOR and
OC1-5
SS
Control
PWM/
LVD
Reset
Timer
Timer
Address Bus
(2)
Control
(3)
PCH
Stack
Program Counter
Logic
(3)
MCLR
Control Signals
24
8
Timer4/5
CN1-22
PCL
Repeat
Control
Logic
Preliminary
16
(1)
(3)
Inst Register
Inst Latch
Multiplier
Support
SPI1/2
Divide
17x17
RTCC
16
Data Bus
(3)
I2C1/2
W Reg Array
10-Bit
ADC
Data Latch
Read AGU
Data RAM
Write AGU
EA MUX
Address
16 x 16
16
Latch
16-Bit ALU
16
16
16
16
Comparators
UART1/2
© 2008 Microchip Technology Inc.
16
(3)
(3)
16
RB0:RB15
PORTC
PORTA
RP0:RP25
RA0:RA9
RC0:RC9
PORTB
PMP/PSP
RP
(1)
(1)
(1)