PIC18LF44J11-I/ML Microchip Technology, PIC18LF44J11-I/ML Datasheet - Page 26

IC PIC MCU FLASH 16K 2V 44-QFN

PIC18LF44J11-I/ML

Manufacturer Part Number
PIC18LF44J11-I/ML
Description
IC PIC MCU FLASH 16K 2V 44-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18LF44J11-I/ML

Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
44-QFN
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
34
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3776 B
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
31 KHz
Number Of Programmable I/os
22
Number Of Timers
5
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183022, DM183032, DV164136, MA180023
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
PIC18F2XJXX/4XJXX FAMILY
6.0
DS39687D-page 26
Standard Operating Conditions
Operating Temperature: 25°C is recommended
Param
P1
P2
P2A
P2B
P3
P4
P5
P5A
P6
P9
P10
P11
P12
P13
P14
P16
P17
P19
P20
Note 1:
No.
2:
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
Symbol
AC/DC CHARACTERISTICS TIMING REQUIREMENTS
FOR PROGRAM/VERIFY TEST MODE (CONTINUED)
DLY
R
PGC
PGCL
PGCH
SET
HLD
DLY
DLY
DLY
DLY
DLY
HLD
SET
VALID
DLY
HLD
KEY
KEY
External power must be supplied to the V
Section 2.1.1 “PIC18F2XJXX/4XJXX/ LF2XJXX/LF4XJXX Devices and the On-Chip Voltage Regulator” for
more information.
V
of V
1
1
1
1
2
5
6
7
2
2
8
3
1
2
DD
A
DD
must also be supplied to the AV
MCLR Rise Time to Enter Program/Verify
mode
Serial Clock (PGC) Period
Serial Clock (PGC) Low Time
Serial Clock (PGC) High Time
Input Data Setup Time to Serial Clock ↓
Input Data Hold Time from PGC ↓
Delay Between 4-Bit Command and
Command Operand
Delay Between 4-Bit Command Operand and
Next 4-Bit Command
Delay Between Last PGC ↓ of Command Byte
to First PGC ↑ of Read of Data Word
PGC High Time (minimum programming time)
PGC Low Time after Programming
Delay to allow Bulk Erase to Occur
Input Data Hold Time from MCLR ↑
V
Data Out Valid from PGC ↑
Delay Between Last PGC ↓ and MCLR ↓
MCLR ↓ to V
Delay from First MCLR ↓ to First PGC ↑ for
Key Sequence on PGD
Delay from Last PGC ↓ for Key Sequence on
PGD to Second MCLR ↑
and V
DD
↑ Setup Time to MCLR ↑
SS
, respectively.
DD
Characteristic
DD
pins during programming. AV
DDCORE
/V
CAP
pin if the on-chip voltage regulator is disabled. See
Min
100
400
400
400
100
40
10
40
15
15
40
40
20
10
40
40
0
Max
100
DD
1.0
and AV
Units
ms
ms
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
μs
ns
ns
ns
ns
ns
s
SS
© 2008 Microchip Technology Inc.
should always be within ±0.3V
Conditions

Related parts for PIC18LF44J11-I/ML