PIC16C711-04/SO Microchip Technology, PIC16C711-04/SO Datasheet - Page 52
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PIC16C711-04/SO
Manufacturer Part Number
PIC16C711-04/SO
Description
IC MCU OTP 1KX14 A/D 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16C711-04/SO
Program Memory Type
OTP
Program Memory Size
1.75KB (1K x 14)
Package / Case
18-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
13
Ram Size
68 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 4x8b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Processor Series
PIC16C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
68 B
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
13
Number Of Timers
1
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
0 C
On-chip Adc
4-ch x 8-bit
Data Rom Size
68 B
Height
2.31 mm
Length
11.53 mm
Supply Voltage (max)
6 V
Supply Voltage (min)
4 V
Width
7.49 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1011 - ADAPTER 18-SOIC TO 18-DIP309-1010 - ADAPTER 18-SOIC TO 18-DIPAC164010 - MODULE SKT PROMATEII DIP/SOIC
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16C711-04/SO
Manufacturer:
MIC
Quantity:
20 000
PIC16C71X
8.3
The PIC16CXX differentiates between various kinds of
reset:
• Power-on Reset (POR)
• MCLR reset during normal operation
• MCLR reset during SLEEP
• WDT Reset (normal operation)
• Brown-out Reset (BOR) (PIC16C710/711/715)
• Parity Error Reset (PIC16C715)
Some registers are not affected in any reset condition;
their status is unknown on POR and unchanged in any
other reset. Most other registers are reset to a “reset
state” on Power-on Reset (POR), on the MCLR and
FIGURE 8-9:
DS30272A-page 52
Applicable Devices
MCLR/V
Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin.
OSC1/
CLKIN
V
Pin
DD
2: Brown-out Reset is implemented on the PIC16C710/711/715.
3: Parity Error Reset is implemented on the PIC16C715.
Reset
PP
On-chip
RC OSC
Pin
OST/PWRT
Brown-out
Program
Memory
Parity
V
Module
Reset
(1)
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
detect
WDT
DD
rise
(3)
OST
PWRT
(2)
SLEEP
10-bit Ripple-counter
10-bit Ripple-counter
710 71 711 715
WDT Time-out
Power-on Reset
MPEEN
BODEN
External
Reset
Enable PWRT
Enable OST
WDT Reset, on MCLR reset during SLEEP, and Brown-
out Reset (BOR). They are not affected by a WDT
Wake-up, which is viewed as the resumption of normal
operation. The TO and PD bits are set or cleared differ-
ently in different reset situations as indicated in Table 8-
7, Table 8-8 and Table 8-9. These bits are used in soft-
ware to determine the nature of the reset. See Table 8-
10 and Table 8-11 for a full description of reset states
of all registers.
A simplified block diagram of the on-chip reset circuit is
shown in Figure 8-9.
The PIC16C710/711/715 have a MCLR noise filter in
the MCLR reset path. The filter will detect and ignore
small pulses.
It should be noted that a WDT Reset does not drive
MCLR pin low.
See Table 8-6 for time-out situations.
1997 Microchip Technology Inc.
S
R
Q
Chip_Reset