ATMEGA8515L-8PU Atmel, ATMEGA8515L-8PU Datasheet - Page 178

IC AVR MCU 8K 8MHZ 3V 40DIP

ATMEGA8515L-8PU

Manufacturer Part Number
ATMEGA8515L-8PU
Description
IC AVR MCU 8K 8MHZ 3V 40DIP
Manufacturer
Atmel
Series
AVR® ATmegar

Specifications of ATMEGA8515L-8PU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SPI, USART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
35
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
8MHz
Total Internal Ram Size
512Byte
# I/os (max)
35
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
40
Package Type
PDIP W
Controller Family/series
AVR MEGA
No. Of I/o's
35
Eeprom Memory Size
512Byte
Ram Memory Size
512Byte
Cpu Speed
8MHz
Rohs Compliant
Yes
For Use With
ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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178
ATmega8515(L)
Table 80. Explanation of Different Variables used in Figure 74 and the Mapping to the
Z-pointer
Note:
Variable
PCMSB
PAGEMSB
ZPCMSB
ZPAGEMSB
PCPAGE
PCWORD
1. Z15:Z13: always ignored.
(1)
Z0: should be zero for all SPM commands, byte select for the LPM instruction.
See “Addressing the Flash During Self-Programming” on page 171 for details about
the use of Z-pointer during Self-Programming.
PC[11:5]
PC[4:0]
11
4
Corresponding
Z-value
Z12:Z6
Z5:Z1
Z12
Z5
Program Counter word address: Word select,
Description
Most significant bit in the Program Counter.
(The Program Counter is 12 bits PC[11:0])
Most significant bit which is used to address
the words within one page (32 words in a page
requires five bits PC [4:0]).
Bit in Z-register that is mapped to PCMSB.
Because Z0 is not used, the ZPCMSB equals
PCMSB + 1.
Bit in Z-register that is mapped to PAGEMSB.
Because Z0 is not used, the ZPAGEMSB
equals PAGEMSB + 1.
Program Counter page address: Page select,
for Page Erase and Page Write
for filling temporary buffer (must be zero during
Page Write operation)
2512K–AVR–01/10

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