PIC16LF87-I/P Microchip Technology, PIC16LF87-I/P Datasheet - Page 3
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PIC16LF87-I/P
Manufacturer Part Number
PIC16LF87-I/P
Description
IC MCU FLASH 4KX14 EEPROM 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16LF627A-IP.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16F87-IP.pdf
(228 pages)
4.PIC16F87-IP.pdf
(8 pages)
5.PIC16F87-IP.pdf
(4 pages)
6.PIC16F87-IP.pdf
(8 pages)
Specifications of PIC16LF87-I/P
Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Core Processor
PIC
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
18-DIP (0.300", 7.62mm)
Controller Family/series
PIC16LF
No. Of I/o's
16
Eeprom Memory Size
256Byte
Ram Memory Size
368Byte
Cpu Speed
20MHz
No. Of Timers
3
Processor Series
PIC16LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
SSP, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LF87-I/P
Manufacturer:
Microchip
Quantity:
720
1. Module: Timer1 (Asynchronous Counter)
TABLE 1:
© 2007 Microchip Technology Inc.
When writing to the TMR1H register, under
specific conditions, it is possible that the TMR1L
register will miss a count while connected to the
external oscillator via the T1OSO and T1OSI pins.
When Timer1 is started, the circuitry looks for a
falling edge before a rising edge can increment the
counter. Writing to the TMR1H register is similar to
starting Timer1; therefore, the former logic stated
Work around
Operating Conditions: F
from Sleep, Timer1 interrupt enabled, global
interrupts enabled.
The code excerpts in Example 1, Example 2 and
Example 3 show how the TMR1H register can be
updated while the external clock (32.768 kHz) is
still on its high pulse.
40 MHz (PIC18)
16 MHz
20 MHz
FREQUENCY DEPENDENT INSTRUCTION EXECUTION AMOUNTS
1 MHz
2 MHz
4 MHz
8 MHz
F
OSC
OSC
≥ 4 MHz, no wake-ups
T
CY
0.25
0.5
0.2
0.1
4
2
1
(μs)
applies any time the TMR1H register is written. If
the TMR1H register is not completely written to
during the high pulse of the external clock, then the
TMR1L register will miss a count due to the circuit
operation stated previously. The high pulse of a
32.768 kHz external clock crystal yields a 15.25 μs
window for the write to TMR1H to occur. The
amount of instructions that can be executed within
this window is frequency dependent, as shown in
Table 1 below.
The importance of the code examples is that the
bold instructions are executed within the first
15.25 μs high pulse on the external clock after the
Timer1 overflow occurred. This will allow the
TMR1L register to increment correctly.
TIMER1 MODULE
T
CY
within 15.25 μs
15.25
76.25
152.5
3.81
7.63
30.5
61
DS80233C-page 3