PIC16CE625-04I/SO Microchip Technology, PIC16CE625-04I/SO Datasheet - Page 76

IC MCU OTP 2KX14 EE COMP 18SOIC

PIC16CE625-04I/SO

Manufacturer Part Number
PIC16CE625-04I/SO
Description
IC MCU OTP 2KX14 EE COMP 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheet

Specifications of PIC16CE625-04I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
13
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
18-SOIC (7.5mm Width)
For Use With
XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MIL309-1075 - ADAPTER 18-SOIC TO 18-SOICAC164010 - MODULE SKT PROMATEII DIP/SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Connectivity
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16CE625-04I/SO
Manufacturer:
MICROCHI
Quantity:
11
PIC16CE62X
SWAPF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
DS40182C-page 76
TRIS
Operands:
Syntax:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
Example
Swap Nibbles in f
[ label ] SWAPF f,d
0
d
(f<3:0>)
(f<7:4>)
None
The upper and lower nibbles of
register ’f’ are exchanged. If ’d’ is 0,
the result is placed in W register. If ’d’
is 1, the result is placed in register ’f’.
1
1
Before Instruction
After Instruction
Load TRIS Register
[ label ] TRIS
5
(W)
The instruction is supported for code
compatibility with the PIC16C5X
products. Since TRIS registers are
readable and writable, the user can
directly address them.
1
1
To maintain upward compatibility
with future PICmicro
not use this instruction.
SWAPF REG,
00
00
f
f
[0,1]
127
7
TRIS register f;
0000
REG1
REG1
W
1110
(dest<7:4>),
(dest<3:0>)
f
0
0110
dfff
=
=
=
®
products, do
0xA5
0xA5
0x5A
0fff
ffff
XORLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
XORWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Exclusive OR W with f
[ label ] XORWF
0
d
(W) .XOR. (f)
Z
Exclusive OR the contents of the
W register with register 'f'. If 'd' is 0,
the result is stored in the W register. If
'd' is 1, the result is stored back in reg-
ister 'f'.
1
1
XORWF
Before Instruction
After Instruction
Exclusive OR Literal with W
[ label ]
0
(W) .XOR. k
Z
The contents of the W register are
XOR’ed with the eight bit literal 'k'.
The result is placed in the
W register.
1
1
XORLW
Before Instruction
After Instruction
00
f
11
[0,1]
k
1999 Microchip Technology Inc.
127
255
REG
W
REG
W
0110
XORLW k
1010
0xAF
W
W
REG
=
=
W)
dest)
1
dfff
kkkk
=
=
=
=
f,d
0xB5
0x1A
0xAF
0xB5
0x1A
0xB5
kkkk
ffff

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