PIC16F870-I/SO Microchip Technology, PIC16F870-I/SO Datasheet - Page 105

IC MCU FLASH 2KX14 EE 28SOIC

PIC16F870-I/SO

Manufacturer Part Number
PIC16F870-I/SO
Description
IC MCU FLASH 2KX14 EE 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F870-I/SO

Program Memory Type
FLASH
Program Memory Size
3.5KB (2K x 14)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Eeprom Size
64 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
Minimum Operating Temperature
- 40 C
On-chip Adc
5-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MILI3-DB16F871 - BOARD DAUGHTER ICEPIC3
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F870-I/SO
Manufacturer:
MICROCHIP
Quantity:
1 200
Part Number:
PIC16F870-I/SO
Manufacturer:
MIC
Quantity:
20 000
1997 Microchip Technology Inc.
The map in
Unimplemented registers will read as '0'.
Figure 6-6: Register File Map
Note 1: Registers in BOLD will be present in every device.
2: These registers may not be implemented, or are implemented as other registers in
3: Not all locations may be implemented. Unimplemented locations will read as ’0’.
4: These locations are unimplemented in Bank1. Access to these unimplemented
some devices.
locations will access the corresponding Bank0 register.
Section 6. Memory Organization
Figure 6-6
Registers
EEDATA
ADCON0 /
EEADR
ADRES /
PCLATH
STATUS
INTCON
Purpose
General
PORTA
PORTB
Bank0
TMR0
INDF
PCL
FSR
shows the register file memory map of some 18-pin devices.
(2)
(2)
(3)
File
Address
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
7Fh
OPTION_REG 81h
Registers
EECON1
EECON2
ADCON1 /
ADRES /
PCLATH
STATUS
INTCON
Purpose
General
TRISA
TRISB
PCON
Bank1
INDF
PCL
FSR
(2)
(2)
(4)
File
Address
80h
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
FFh
DS31006A-page 6-11
6

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