PIC16F872-I/SO Microchip Technology, PIC16F872-I/SO Datasheet - Page 22
![IC MCU FLASH 2KX14 EE 28SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
PIC16F872-I/SO
Manufacturer Part Number
PIC16F872-I/SO
Description
IC MCU FLASH 2KX14 EE 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16C770-ISO.pdf
(8 pages)
4.PIC16F872-ISO.pdf
(168 pages)
5.PIC16F872-ISO.pdf
(5 pages)
6.PIC16F872-ISO.pdf
(6 pages)
7.PIC16F872-ISO.pdf
(168 pages)
Specifications of PIC16F872-I/SO
Program Memory Type
FLASH
Program Memory Size
3.5KB (2K x 14)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Eeprom Size
64 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
I2C/SPI/SSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
3
Operating Supply Voltage
4 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
5-ch x 10-bit
Package
28SOIC W
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL309-1073 - ADAPTER 28-SOIC TO 28-SOIC309-1024 - ADAPTER 28-SOIC TO 28-DIP309-1023 - ADAPTER 28-SOIC TO 28-DIP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F872-I/SO
Manufacturer:
MICROCHI
Quantity:
470
Company:
Part Number:
PIC16F872-I/SO
Manufacturer:
TI
Quantity:
5
Part Number:
PIC16F872-I/SO
Manufacturer:
MIC
Quantity:
20 000
PIC16F872
2.3
The program counter (PC) is 13-bits wide. The low byte
comes from the PCL register, which is a readable and
writable register. The upper bits (PC<12:8>) are not
readable, but are indirectly writable through the
PCLATH register. On any RESET, the upper bits of the
PC will be cleared. Figure 2-3 shows the two situations
for the loading of the PC. The upper example in the fig-
ure shows how the PC is loaded on a write to PCL
(PCLATH<4:0>
ure shows how the PC is loaded during a CALL or GOTO
instruction (PCLATH<4:3>
FIGURE 2-3:
2.3.1
A computed GOTO is accomplished by adding an offset
to the program counter (ADDWF PCL). When doing a
table read using a computed GOTO method, care
should be exercised if the table location crosses a PCL
memory boundary (each 256 byte block). Refer to the
Application Note, “Implementing a Table Read"
(AN556).
DS30221C-page 20
PC
PC
12
12 11 10
2
PCL and PCLATH
5
PCH
PCLATH<4:3>
PCH
COMPUTED GOTO
PCLATH
PCLATH<4:0>
8
PCLATH
8
PCH). The lower example in the fig-
7
7
LOADING OF PC IN
DIFFERENT SITUATIONS
PCL
PCL
PCH).
11
8
0
0
Instruction with
PCL as
Destination
ALU
GOTO,CALL
Opcode <10:0>
2.3.2
The PIC16FXXX family has an 8-level deep x 13-bit
wide hardware stack. The stack space is not part of
either program or data space and the stack pointer is
not readable or writable. The PC is PUSHed onto the
stack when a CALL instruction is executed or an inter-
rupt causes a branch. The stack is POPed in the event
of a RETURN, RETLW or a RETFIE instruction execu-
tion. PCLATH is not affected by a PUSH or POP oper-
ation.
The stack operates as a circular buffer. This means that
after the stack has been PUSHed eight times, the ninth
push overwrites the value that was stored from the first
push. The tenth push overwrites the second push (and
so on).
2.4
All PIC16FXXX devices are capable of addressing a
continuous 8K word block of program memory. The
CALL and GOTO instructions provide only 11 bits of
address to allow branching within any 2K program
memory page. When doing a CALL or GOTO instruction,
the upper 2 bits of the address are provided by
PCLATH<4:3>. Since the PIC16F872 has only 2K
words of program memory or one page, additional code
is not required to ensure that the correct page is
selected before a CALL or GOTO instruction is exe-
cuted. The PCLATH<4:3> bits should always be main-
tained as zeros. If a return from a CALL instruction (or
interrupt) is executed, the entire 13-bit PC is popped off
the
PCLATH<4:3> bits are not required for the return
instructions (which POPs the address from the stack).
Note:
Note 1: There are no status bits to indicate stack
stack.
Program Memory Paging
2: There are no instructions/mnemonics
The contents of the PCLATH register are
unchanged after a RETURN or RETFIE
instruction is executed. The user must
rewrite the contents of the PCLATH regis-
ter for any subsequent subroutine calls or
GOTO instructions.
STACK
overflow or stack underflow conditions.
called PUSH or POP. These are actions
that occur from the execution of the
CALL, RETURN, RETLW and RETFIE
instructions, or the vectoring to an inter-
rupt address.
Therefore,
© 2006 Microchip Technology Inc.
manipulation
of
the