DSPIC30F2012-20I/SO Microchip Technology, DSPIC30F2012-20I/SO Datasheet - Page 60

IC DSPIC MCU/DSP 12K 28SOIC

DSPIC30F2012-20I/SO

Manufacturer Part Number
DSPIC30F2012-20I/SO
Description
IC DSPIC MCU/DSP 12K 28SOIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F2012-20I/SO

Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Core Frequency
40MHz
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
20
Flash Memory Size
12KB
Supply Voltage Range
2.5V To 5.5V
Operating Temperature Range
-40°C To +85°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F201220ISO

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F2012-20I/SO
Manufacturer:
MICROCHI
Quantity:
20 000
Part Number:
DSPIC30F2012-20I/SO
0
dsPIC30F2011/2012/3012/3013
7.2
The use of the ADPCFG and TRIS registers control the
operation of the A/D port pins. The port pins that are
desired as analog inputs must have their correspond-
ing TRIS bit set (input). If the TRIS bit is cleared
(output), the digital output level (V
converted.
When reading the Port register, all pins configured as
analog input channels will read as cleared (a low level).
Pins configured as digital inputs will not convert an ana-
log input. Analog levels on any pin that is defined as a
digital input (including the ANx pins) may cause the
input buffer to consume current that exceeds the
device specifications.
DS70139C-page 58
Configuring Analog Port Pins
OH
or V
OL
) will be
Preliminary
7.2.1
One instruction cycle is required between a port
direction change or port write operation and a read
operation of the same port. Typically this instruction
would be a NOP.
EXAMPLE 7-1:
MOV #0xF0, W0; Configure PORTB<7:4>
MOV W0, TRISB; and PORTB<3:0> as outputs
NOP
btss PORTB, #7; bit test RB7 and skip if set
I/O PORT WRITE/READ TIMING
; as inputs
; additional instruction cycle
PORT WRITE/READ
EXAMPLE
© 2005 Microchip Technology Inc.

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