PIC16F872-I/SS Microchip Technology, PIC16F872-I/SS Datasheet - Page 282

IC MCU FLASH 2KX14 EE 28SSOP

PIC16F872-I/SS

Manufacturer Part Number
PIC16F872-I/SS
Description
IC MCU FLASH 2KX14 EE 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F872-I/SS

Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Controller Family/series
PIC16F
No. Of I/o's
22
Eeprom Memory Size
64Byte
Ram Memory Size
128Byte
Cpu Speed
20MHz
No. Of Timers
3
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
I2C, SPI, SSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
3 bit
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164307 - MODULE SKT FOR PM3 28SSOPAC164020 - MODULE SKT PROMATEII 44TQFPXLT28SS-1 - SOCKET TRANSITION ICE 28SSOP
Lead Free Status / Rohs Status
 Details

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Quantity
Price
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PICmicro MID-RANGE MCU FAMILY
Register 17-2:
DS31017A-page 17-6
bit 7
bit 6
bit 5
bit 4
SSPCON1: SSP Control Register1
bit 7
WCOL: Write Collision Detect bit
Master Mode:
1 = A write to the SSPBUF register was attempted while the I
0 = No collision
Slave Mode:
1 = The SSPBUF register is written while it is still transmitting the previous word
0 = No collision
SSPOV: Receive Overflow Indicator bit
In SPI mode:
1 = A new byte is received while the SSPBUF register is still holding the previous data. In case
0 = No overflow
In I
1 = A byte is received while the SSPBUF register is still holding the previous byte. SSPOV is a
0 = No overflow
SSPEN: Synchronous Serial Port Enable bit
In both modes, when enabled, these pins must be properly configured as input or output.
In SPI mode:
1 = Enables serial port and configures SCK, SDO, SDI, and SS as the source of the serial
0 = Disables serial port and configures these pins as I/O port pins
In I
1 = Enables the serial port and configures the SDA and SCL pins as the source of the
0 = Disables serial port and configures these pins as I/O port pins
CKP: Clock Polarity Select bit
In SPI mode:
1 = Idle state for clock is a high level
0 = Idle state for clock is a low level
In I
SCK release control
1 = Enable clock
0 = Holds clock low (clock stretch) (Used to ensure data setup time)
In I
Unused in this mode
WCOL
R/W-0
2
2
2
2
port pins
serial port pins
transmission to be started
(must be cleared in software)
of overflow, the data in SSPSR is lost. Overflow can only occur in slave mode. In slave
mode, the user must read the SSPBUF, even if only transmitting data, to avoid setting over-
flow. In master mode the overflow bit is not set since each new reception (and transmission)
is initiated by writing to the SSPBUF register.
“don’t care” in transmit mode. SSPOV must be cleared in software in either mode. (must be
cleared in software)
C master mode
C mode:
C mode:
C slave mode:
SSPOV
R/W-0
SSPEN
R/W-0
Preliminary
R/W-0
CKP
SSPM3
R/W-0
2
C conditions were not valid for a
SSPM2
R/W-0
1997 Microchip Technology Inc.
SSPM1
R/W-0
bit 0
SSPM0
R/W-0

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