PIC16LF870-I/SS Microchip Technology, PIC16LF870-I/SS Datasheet - Page 72
![IC MCU FLASH 2KX14 EE A/D 28SSOP](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC16LF870-I/SS
Manufacturer Part Number
PIC16LF870-I/SS
Description
IC MCU FLASH 2KX14 EE A/D 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Specifications of PIC16LF870-I/SS
Program Memory Type
FLASH
Program Memory Size
3.5KB (2K x 14)
Package / Case
28-SSOP
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Eeprom Size
64 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
Minimum Operating Temperature
- 40 C
On-chip Adc
5-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LF870-I/SS
Manufacturer:
MCP
Quantity:
266
Part Number:
PIC16LF870-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC16F870/871
9.2.3
When setting up an Asynchronous Reception with
Address Detect enabled:
• Initialize the SPBRG register for the appropriate
• Enable the asynchronous serial port by clearing
• If interrupts are desired, then set enable bit RCIE.
• Set bit RX9 to enable 9-bit reception.
• Set ADDEN to enable address detect.
• Enable the reception by setting enable bit CREN.
FIGURE 9-6:
DS30569B-page 70
baud rate. If a high speed baud rate is desired, set
bit BRGH.
bit SYNC and setting bit SPEN.
F
OSC
RC7/RX/DT
SETTING UP 9-BIT MODE WITH
ADDRESS DETECT
Baud Rate Generator
x64 Baud Rate CLK
USART RECEIVE BLOCK DIAGRAM
SPBRG
Pin Buffer
and Control
RSR<8>
SPEN
ADDEN
ADDEN
RX9
RX9
Data
Recovery
Interrupt
or
64
16
CREN
Enable
Load of
Receive
Buffer
RCIF
RCIE
• Flag bit RCIF will be set when reception is com-
• Read the RCSTA register to get the ninth bit and
• Read the 8-bit received data by reading the
• If any error occurred, clear the error by clearing
• If the device has been addressed, clear the
RX9
plete, and an interrupt will be generated if enable
bit RCIE was set.
determine if any error occurred during reception.
RCREG register, to determine if the device is
being addressed.
enable bit CREN.
ADDEN bit to allow data bytes and address bytes
to be read into the receive buffer, and interrupt the
CPU.
STOP
MSb
RX9D
(8)
OERR
7
RSR Register
RCREG Register
8
Data Bus
2003 Microchip Technology Inc.
8
8
1
FERR
0
START
LSb
FIFO