PIC24HJ32GP204-I/PT Microchip Technology, PIC24HJ32GP204-I/PT Datasheet - Page 238

IC PIC MCU FLASH 32K 44TQFP

PIC24HJ32GP204-I/PT

Manufacturer Part Number
PIC24HJ32GP204-I/PT
Description
IC PIC MCU FLASH 32K 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Hr

Specifications of PIC24HJ32GP204-I/PT

Program Memory Type
FLASH
Program Memory Size
32KB (11K x 24)
Package / Case
44-TQFP, 44-VQFP
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
35
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001
Minimum Operating Temperature
- 40 C
On-chip Adc
13-ch x 12-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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I
In-Circuit Debugger ........................................................... 179
In-Circuit Emulation........................................................... 173
In-Circuit Serial Programming (ICSP) ....................... 173, 179
Infrared Support
Input Capture
Input Change Notification.................................................... 94
Instruction Addressing Modes............................................. 34
Instruction Set
Instruction-Based Power-Saving Modes ............................. 91
Internal RC Oscillator
Internet Address................................................................ 238
Interrupt Control and Status Registers................................ 57
Interrupt Setup Procedures ................................................. 79
Interrupt Vector Table (IVT) ................................................ 53
Interrupts Coincident with Power Save Instructions............ 92
J
JTAG Boundary Scan Interface ........................................ 173
M
Memory Organization.......................................................... 19
Microchip Internet Web Site .............................................. 238
MPLAB ASM30 Assembler, Linker, Librarian ................... 190
MPLAB ICD 2 In-Circuit Debugger ................................... 191
MPLAB ICE 2000 High-Performance Universal In-Circuit
MPLAB Integrated Development Environment Software .. 189
MPLAB PM3 Device Programmer .................................... 191
MPLAB REAL ICE In-Circuit Emulator System................. 191
MPLINK Object Linker/MPLIB Object Librarian ................ 190
Multi-Bit Data Shifter ........................................................... 18
N
NVM Module
O
Open-Drain Configuration ................................................... 94
Output Compare ............................................................... 127
© 2007 Microchip Technology Inc.
2
C Module
Software Controlled Clock Stretching (STREN = 1).. 143
I2C1 Register Map ...................................................... 27
Built-in IrDA Encoder and Decoder........................... 153
External IrDA, IrDA Clock Output.............................. 153
Registers................................................................... 126
File Register Instructions ............................................ 34
Fundamental Modes Supported.................................. 35
MCU Instructions ........................................................ 34
Move and Accumulator Instructions............................ 35
Other Instructions........................................................ 35
Overview ................................................................... 184
Summary................................................................... 181
Idle .............................................................................. 92
Sleep........................................................................... 91
Use with WDT ........................................................... 177
IECx ............................................................................ 57
IFSx............................................................................. 57
INTCON1 .................................................................... 57
INTCON2 .................................................................... 57
IPCx ............................................................................ 57
Initialization ................................................................. 79
Interrupt Disable.......................................................... 79
Interrupt Service Routine ............................................ 79
Trap Service Routine .................................................. 79
Emulator.................................................................... 191
Register Map............................................................... 33
Registers................................................................... 131
PIC24HJ32GP202/204 and PIC24HJ16GP304
Preliminary
P
Packaging ......................................................................... 227
Peripheral Module Disable (PMD) ...................................... 92
PICSTART Plus Development Programmer..................... 192
Pinout I/O Descriptions (table)............................................ 11
PMD Module
POR and Long Oscillator Start-up Times ........................... 51
PORTA
PORTB
Power-Saving Features ...................................................... 91
Program Address Space..................................................... 19
Program Memory
Pulse-Width Modulation Mode.......................................... 128
PWM
R
Reader Response............................................................. 239
Registers
Details....................................................................... 228
Marking..................................................................... 227
Register Map .............................................................. 33
Register Map .............................................................. 32
Register Map .............................................................. 32
Clock Frequency and Switching ................................. 91
Construction ............................................................... 36
Data Access from Program Memory Using
Data Access from Program Memory Using
Data Access from, Address Generation ..................... 37
Memory Map............................................................... 19
Table Read Instructions
Visibility Operation...................................................... 39
Interrupt Vector........................................................... 20
Organization ............................................................... 20
Reset Vector............................................................... 20
Duty Cycle ................................................................ 128
Period ....................................................................... 128
AD1CHS0 (ADC1 Input Channel 0 Select................ 169
AD1CHS123 (ADC1 Input Channel 1, 2, 3 Select)... 167
AD1CON1 (ADC1 Control 1) .................................... 163
AD1CON2 (ADC1 Control 2) .................................... 165
AD1CON3 (ADC1 Control 3) .................................... 166
AD1CSSL (ADC1 Input Scan Select Low) ............... 171
AD1PCFGL (ADC1 Port Configuration Low) ............ 171
CLKDIV (Clock Divisor) .............................................. 86
CORCON (Core Control) ...................................... 17, 59
I2CxCON (I2Cx Control)........................................... 145
I2CxMSK (I2Cx Slave Mode Address Mask)............ 149
I2CxSTAT (I2Cx Status) ........................................... 147
ICxCON (Input Capture x Control)............................ 126
IEC0 (Interrupt Enable Control 0) ................... 66, 68, 69
IFS0 (Interrupt Flag Status 0) ..................................... 62
IFS1 (Interrupt Flag Status 1) ..................................... 64
IFS4 (Interrupt Flag Status 4) ..................................... 65
INTCON1 (Interrupt Control 1) ................................... 60
INTCON2 (Interrupt Control 2) ................................... 61
INTTREG Interrupt Control and Status Register ........ 78
IPC0 (Interrupt Priority Control 0) ............................... 70
IPC1 (Interrupt Priority Control 1) ............................... 71
IPC16 (Interrupt Priority Control 16) ........................... 77
IPC2 (Interrupt Priority Control 2) ............................... 72
IPC3 (Interrupt Priority Control 3) ............................... 73
Program Space Visibility..................................... 39
Table Instructions ............................................... 38
TBLRDH ............................................................. 38
TBLRDL.............................................................. 38
DS70289A-page 236

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