PIC24FJ32GA004-E/PT Microchip Technology, PIC24FJ32GA004-E/PT Datasheet - Page 164
![IC PIC MCU FLASH 32K 44-TQFP](/photos/6/82/68251/c04-076_pt_sml.jpg)
PIC24FJ32GA004-E/PT
Manufacturer Part Number
PIC24FJ32GA004-E/PT
Description
IC PIC MCU FLASH 32K 44-TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ16GA002-ISS.pdf
(52 pages)
2.PIC24FJ16GA002-ISS.pdf
(268 pages)
3.PIC24FJ16GA002-ISS.pdf
(22 pages)
4.PIC24FJ64GA004-EPT.pdf
(262 pages)
Specifications of PIC24FJ32GA004-E/PT
Program Memory Type
FLASH
Program Memory Size
32KB (11K x 24)
Package / Case
44-TQFP, 44-VQFP
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
35
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C, IrDA, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
35
Number Of Timers
5
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240011, DM300027, DV164033, MA240013, AC164127, DM240002
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDDM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164335 - MODULE SKT FOR 10X10 PM3 44TQFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ32GA004-E/PT
Manufacturer:
MICROCHIP
Quantity:
125
Company:
Part Number:
PIC24FJ32GA004-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Company:
Part Number:
PIC24FJ32GA004-E/PT
Manufacturer:
MICROCHIP
Quantity:
1 000
Part Number:
PIC24FJ32GA004-E/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC24FJ64GA004 FAMILY
REGISTER 17-2:
DS39881D-page 164
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15,13
bit 14
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7-6
Note 1:
URXISEL1
UTXISEL1
R/W-0
R/W-0
If UARTEN = 1, the peripheral inputs and outputs must be configured to an available RPn pin. See
Section 10.4 “Peripheral Pin Select” for more information.
UTXISEL1:UTXISEL0: Transmission Interrupt Mode Selection bits
11 = Reserved; do not use
10 = Interrupt when a character is transferred to the Transmit Shift Register (TSR) and as a result, the
01 = Interrupt when the last character is shifted out of the Transmit Shift Register; all transmit
00 = Interrupt when a character is transferred to the Transmit Shift Register (this implies there is at
UTXINV: IrDA
If IREN = 0:
1 = UxTX Idle ‘0’
0 = UxTX Idle ‘1’
If IREN = 1:
1 = UxTX Idle ‘1’
0 = UxTX Idle ‘0’
Unimplemented: Read as ‘0’
UTXBRK: Transmit Break bit
1 = Send Sync Break on next transmission – Start bit, followed by twelve ‘0’ bits, followed by Stop bit;
0 = Sync Break transmission disabled or completed
UTXEN: Transmit Enable bit
1 = Transmit enabled, UxTX pin controlled by UARTx
0 = Transmit disabled, any pending transmission is aborted and buffer is reset. UxTX pin controlled by
UTXBF: Transmit Buffer Full Status bit (read-only)
1 = Transmit buffer is full
0 = Transmit buffer is not full, at least one more character can be written
TRMT: Transmit Shift Register Empty bit (read-only)
1 = Transmit Shift Register is empty and transmit buffer is empty (the last transmission has completed)
0 = Transmit Shift Register is not empty, a transmission is in progress or queued
URXISEL1:URXISEL0: Receive Interrupt Mode Selection bits
11 = Interrupt is set on RSR transfer, making the receive buffer full (i.e., has 4 data characters)
10 = Interrupt is set on RSR transfer, making the receive buffer 3/4 full (i.e., has 3 data characters)
0x = Interrupt is set when any character is received and transferred from the RSR to the receive buffer.
URXISEL0
UTXINV
R/W-0
R/W-0
cleared by hardware upon completion
the PORT register.
transmit buffer becomes empty
operations are completed
least one character open in the transmit buffer)
Receive buffer has one or more characters.
UxSTA: UARTx STATUS AND CONTROL REGISTER
®
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
Encoder Transmit Polarity Inversion bit
UTXISEL0
ADDEN
R/W-0
R/W-0
(1)
RIDLE
U-0
R-1
—
HC = Hardware Clearable bit
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0, HC
UTXBRK
PERR
R-0
UTXEN
R/W-0
FERR
R-0
(1)
2010 Microchip Technology Inc.
x = Bit is unknown
UTXBF
OERR
R/C-0
R-0
URXDA
TRMT
R-1
R-0
bit 8
bit 0