DSPIC30F2010-20I/MM Microchip Technology, DSPIC30F2010-20I/MM Datasheet - Page 193
![IC DSPIC MCU/DSP 12K 28QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
DSPIC30F2010-20I/MM
Manufacturer Part Number
DSPIC30F2010-20I/MM
Description
IC DSPIC MCU/DSP 12K 28QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F2010-20ISO.pdf
(202 pages)
3.DSPIC30F2010-20ISO.pdf
(18 pages)
4.DSPIC30F2010-20ISO.pdf
(6 pages)
5.DSPIC30F2010-20ISO.pdf
(26 pages)
6.DSPIC30F2010-20IMM.pdf
(204 pages)
Specifications of DSPIC30F2010-20I/MM
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-QFN
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
20
Flash Memory Size
12KB
Supply Voltage Range
2.5V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F2010-20I/MMG
DSPIC30F201020IMM
DSPIC30F201020IMM
DSPIC30F201020IMM
DSPIC30F201020IMM
- DSPIC30F2011-20ISO PDF datasheet
- DSPIC30F2010-20ISO PDF datasheet #2
- DSPIC30F2010-20ISO PDF datasheet #3
- DSPIC30F2010-20ISO PDF datasheet #4
- DSPIC30F2010-20ISO PDF datasheet #5
- DSPIC30F2010-20IMM PDF datasheet #6
- Current page: 193 of 204
- Download datasheet (3Mb)
APPENDIX A:
Revision F (May 2006)
Previous versions of this data sheet contained
Advance or Preliminary Information. They were
distributed with incomplete characterization data.
This revision reflects these updates:
• Supported I
• 10-bit A/D High-speed Conversion timing
• Operating Current (I
• Idle Current (I
• Power-down Current (I
• I/O pin Input specifications
• BOR voltage limits
• PLL Clock Timing specifications
• PLL Jitter specifications
• Internal RC Accuracy specifications
• Watchdog Timer time-out limits
• Additional minor corrections throughout
Revision G (December 2006)
This revision includes updates to the packaging
diagrams.
© 2008 Microchip Technology Inc.
(see Table 16-1)
requirements (see Section 18.0 “10-bit High-
Speed Analog-to-Digital Converter (ADC)
Module”
(see Table 22-5)
(see Table 22-6)
(see Table 22-7)
(see Table 22-8)
(see Table 22-10)
(see Table 22-14)
(see Table 22-15 )
(see Table 22-17)
(see Table 22-20)
document.
2
C Slave addresses
IDLE
) specifications
DD
REVISION HISTORY
) specifications
PD
) specifications
Revision H (May 2008)
This revision reflects these updates:
• Changed the location of the input reference in the
• Removed incorrect reference to LVDIN function
• Removed erroneous reference to use of the Fast
• Added FUSE Configuration Register (FICD)
• Electrical Specifications:
• Additional minor corrections throughout the
10-bit High-Speed ADC Functional Block Diagram
(see Figure 18-1)
on Port B (see Figure 1-1), previously shown on
pin 4 of SDIP and SOIC packages and pin 1 of
QFN package (see Pin Diagrams)
RC Oscillator with the PLL (see Section 19.2.4
“Phase Locked Loop (PLL)”)
details (see Section 19.6 “Device Configuration
Registers” and Table 19-8)
- Resolved TBD values for parameters DO10,
- 10-bit High-Speed ADC t
- Parameter OS65 (Internal RC Accuracy) has
- Parameter D134 (Erase/Write Cycle Time)
- Parameter DC12 (RAM Data Retention Volt-
- Removed parameters OS62 (Internal FRC
- Parameter OS63 (Internal FRC Accuracy)
- Updated Min and Max values and Conditions
document
DO16, DO20, and DO26 (see Table 22-9)
ter (time to stablilize) has been updated from
20 µs typical to 20 µs maximum (see
Table 22-39)
been expanded (see Table 22-18) to reflect
multiple Min and Max values for different tem-
peratures
has been updated to include Min and Max
values and the Typ value has been removed
(see Table 22-11)
age) has been updated to include a Min value
(see Table 22-4)
Jitter) and OS64 (Internal FRC Drift) and
Note 2 from AC Characteristics (see
Table 22-17)
has been expanded to reflect multiple Min
and Max values for different temperatures
(see Table 22-17)
for parameter SY11 and updated Min, Typ,
and Max values and Conditions for
parameter SY20 (see Table 22-20)
dsPIC30F2010
PDU
timing parame-
DS70118H-page 193
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