PIC18F67J11-I/PT Microchip Technology, PIC18F67J11-I/PT Datasheet - Page 22
![IC PIC MCU FLASH 64KX16 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18F67J11-I/PT
Manufacturer Part Number
PIC18F67J11-I/PT
Description
IC PIC MCU FLASH 64KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.DV164136.pdf
(448 pages)
3.DV164136.pdf
(4 pages)
4.PIC18F63J11-IPT.pdf
(36 pages)
5.PIC18F66J11-IPT.pdf
(4 pages)
6.PIC18F66J11-IPT.pdf
(4 pages)
7.PIC18F66J11-IPT.pdf
(20 pages)
Specifications of PIC18F67J11-I/PT
Program Memory Type
FLASH
Program Memory Size
128KB (64K x 16)
Package / Case
64-TFQFP
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Ram Size
3930 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3904 B
Interface Type
EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
68
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183022, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
15-ch x 10-bit
Package
64TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Operating Supply Voltage
1.8|2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162091 - HEADER MPLAB ICD2 18F87J11 64/80MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11AC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F67J11-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F67J11-I/PT
Manufacturer:
MICROCH
Quantity:
20 000
PIC18F6XJXX/8XJXX
TABLE 5-2:
DS39644L-page 22
300000h CONFIG1L
300001h CONFIG1H
300002h CONFIG2L
300003h CONFIG2H
300004h CONFIG3L
300005h CONFIG3H
3FFFFEh DEVID1
3FFFFFh DEVID2
Legend:
Note
File Name
1:
2:
3:
4:
5:
6:
7:
8:
9:
10:
x = unknown, u = unchanged, — = unimplemented, q = value depends on condition. Shaded cells are unimplemented, read as ‘0’.
Implemented in PIC18F6XJ5X/8XJ5X devices only.
The value of these bits in program memory should always be ‘1’. This ensures that the location is executed as a NOP if it is accidentally
executed.
This bit should always be maintained as ‘0’.
Implemented in 80-pin devices only. On 64-pin devices, these bits are reserved and should always be maintained as ‘1’.
DEVID registers are read-only and cannot be programmed by the user.
Implemented in PIC18F6XJ5X/8XJ5X and PIC18F66J11/66J16/67J11/86J11/86J16/87J11 only.
Implemented in PIC18F8XJ5X and PIC18F86J11/86J16/87J11 only.
Implemented in PIC18FXXJ10/8XJ15 devices only.
Implemented in PIC18FX79X and PIC18FX6J9X.
Not implemented in PIC18F8XJ9X.
(5)
(5)
CONFIGURATION BITS AND DEVICE IDs
WAIT
DEBUG
DEBUG
DEV10
DEV2
IESO
IESO
Bit 7
—
—
—
—
—
—
—
(2)
(2)
(2)
(2)
(2)
(2)
(4,10)
BW
FCMEN
FCMEN
XINST
XINST
DEV1
DEV9
Bit 6
—
—
—
—
—
—
—
(4,10)
(2)
(2)
(2)
(2)
(2)
(2)
EMB1
STVREN
STVREN
DEV0
DEV8
Bit 5
—
—
—
—
—
—
—
—
—
(2)
(2)
(2)
(2)
(2)
(2)
(4,10)
LPT1OSC
EMB0
REV4
DEV7
Bit 4
—
—
—
—
—
—
—
—
—
—
(2)
(2)
(2)
(2)
(2)
(2)
(4,10)
(9)
EASHFT
MSSPSEL
MSSPSEL
PLLDIV2
WDTPS3
T1DIG
REV3
DEV6
Bit 3
—
—
—
—
—
—
(3)
(3)
(9)
(4,10)
(1)
(6)
(6)
PLLDIV1
PMPMX
WDTPS2
FOSC2
FOSC2
REV2
DEV5
Bit 2
CP0
CP0
—
—
—
—
—
(7)
(1)
ECCPMX
ECCPMX
ECCPMX
CPUDIV1
PLLDIV0
WDTPS1
RTCOSC
FOSC1
FOSC1
REV1
DEV4
Bit 1
—
—
—
2009 Microchip Technology Inc.
(4,7,8)
(4,7,8)
(4,7,8)
(1)
(1)
CPUDIV0
WDTPS0
CCP2MX
CCP2MX
CCP2MX
WDTEN
WDTEN
FOSC0
FOSC0
REV0
DEV3
Bit 0
—
—
—
(1)
Unprogrammed
111- ---1
111- 1111
---- 01--
---- 0111
11-- -111
11-1 1111
---- 1111
---- ----
---- --1-
---- --11
---- 1111
---- 1-11
See Table 5-4
See Table 5-4
Default/
Value
(1)
(1)
(7)
(6)