DSPIC33FJ32GP204-I/ML Microchip Technology, DSPIC33FJ32GP204-I/ML Datasheet - Page 2

• Manufacturer Part Number: DSPIC33FJ32GP204-I/ML
• Description: IC DSPIC MCU/DSP 32K 44QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ32GP204-I/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Core Frequency: 40MHz
• Core Supply Voltage: 2.75V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 35
• Flash Memory Size: 32KB
• Supply Voltage Range: 3V To 3.6V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

TABLE 2:
DS80461E-page 2
Note 1:
Identification
Operations
Controller
Regulator
Interrupt
Module
Product
Internal
Voltage
UART
UART
UART
UART
UART
UART
UART
UART
UART
JTAG
I
PSV
2
SPI
I
I
C™
2
2
C
C
Only those issues indicated in the last column apply to the current silicon revision.
SILICON ISSUE SUMMARY
Programming
Temperature
High-Speed
High-Speed
High-Speed
Sleep Mode
SFR Writes
Addressing
Addressing
Auto-Baud
Auto-Baud
Auto-Baud
SCKx Pins
Idle Mode
Extended
Interrupts
IR Mode
IR Mode
Feature
Mode
Mode
Mode
10-bit
10-bit
Flash
—
Number
Item
10.
12.
13.
14.
15.
16.
17.
18.
11.
1.
2.
3.
4.
5.
6.
7.
8.
9.
JTAG programming does not work.
UART receptions may be corrupted if the Baud Rate
Generator (BRG) is set up for 4x mode.
The auto-baud feature may not calculate the correct
baud rate when the BRG is set up for 4x mode.
With the auto-baud feature selected, the Sync Break
character (0x55) may be loaded into the FIFO as data.
The auto-baud feature measures baud rate inaccurately
for certain baud rate and clock speed combinations.
When an auto-baud is detected, the receive interrupt
may occur twice.
When the UART is in 4x mode (BRGH = 1) and using
two Stop bits (STSEL = 1), it may sample the first Stop
bit instead of the second one.
The 16x baud clock signal on the BCLK pin is present
only when the module is transmitting.
If a clock failure occurs when the device is in Idle mode,
the oscillator failure trap does not vector to the Trap
Service Routine (TSR).
The SPIxCON1 DISSCK bit does not influence port
functionality.
The BCL bit in I2CSTAT can only be cleared with a 16-
bit operation, and can be corrupted with 1-bit or 8-bit
operations on I2CSTAT.
When the I
ing using the same address bits (A10 and A9) as other
I
expected.
Revision A2 devices marked as extended temperature
range (E) devices only support industrial temperature
range (I).
The UART error interrupt may not occur, or may occur
at an incorrect time, if multiple errors occur during a
short period of time.
When the UART module is operating in 8-bit mode
(PDSEL = 0x) and using the IrDA
(IREN = 1), the module incorrectly transmits a data
payload of 80h as 00h.
When the VREGS bit (RCON<8>) is set to a logic ‘0’,
device may Reset and higher sleep current may be
observed.
An address error trap occurs in certain addressing
modes when accessing the first four bytes of any PSV
page.
When the I
with an address of 0x102, the I2CxRCV register content
for the lower address byte is 0x01 rather than 0x02.
2
C devices, the A10 and A9 bits may not work as
2
2
C module is configured for 10-bit address-
C module is configured as a 10-bit slave
Issue Summary
®
encoder/decoder
© 2010 Microchip Technology Inc.
A2 A3 A4 A5
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Revisions
Affected
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
(1)
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X