PIC18LF6310-I/PT Microchip Technology, PIC18LF6310-I/PT Datasheet - Page 15

• Manufacturer Part Number: PIC18LF6310-I/PT
• Description: IC PIC MCU FLASH 4KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF6310-I/PT

• Core Size: 8-Bit
• Program Memory Size: 8KB (4K x 16)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 54
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• No. Of Pwm: RoHS Compliant
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

FIGURE 3-7:
3.4
The ID locations are programmed much like the code
memory. The ID registers are mapped in addresses
200000h through 200007h. These locations read out
normally, even after code protection.
TABLE 3-4
© 2007 Microchip Technology Inc.
Step 1: Direct access to code memory.
Step 2: Load write buffer. Panel will be automatically determined by address.
Note:
Command
PGC
PGD
0000
0000
0000
0000
0000
0000
0000
0000
1101
1101
1101
1111
0000
4-Bit
ID Location Programming
The user only needs to fill the 8-byte data
buffer to program the ID locations.
1
1
4-Bit Command
2
1
9C A6
84 A6
0E 20
6E F8
0E 00
6E F7
0E 00
6E F6
<LSB><MSB>
<LSB><MSB>
<LSB><MSB>
<LSB><MSB>
00 00
WRITE ID SEQUENCE
3
1
TABLE WRITE AND START PROGRAMMING INSTRUCTION TIMING (1111)
Data Payload
4
1
P5
1
n
2
n
PIC18F8410/8490/8493 FAMILY
3
16-Bit Data Payload
n
4
n
BCF
BSF
MOVLW 20h
MOVWF TBLPTRU
MOVLW 00h
MOVWF TBLPTRH
MOVLW 00h
MOVWF TBLPTRL
Write 2 bytes and post-increment address by 2
Write 2 bytes and post-increment address by 2
Write 2 bytes and post-increment address by 2
Write 2 bytes and start programming
NOP
5
n
6
n
EECON1, CFGS
EECON1, WREN
PGD = Input
15
n
16
n
P5A
Table 3-4 demonstrates the code sequence required to
write the ID locations.
The Table Pointer must be manually set to 200000h
(base address of the ID locations). The post-increment
feature of the table read 4-bit command should not be
used to increment the Table Pointer to 200000h. After
setting
post-increment feature may be used to increment to
200001h, 200002h and so on.
4-Bit Command
1
0
2
0
Core Instruction
the
3
0
0
Table
Programming Time
P9
Pointer
to
4
DS39624C-page 15
P10
200000h,
Data Payload
1
0
16-Bit
2
0
3
0
the