PIC16F84A-04/P Microchip Technology, PIC16F84A-04/P Datasheet - Page 245
![IC MCU FLASH 1KX14 EE 18DIP](/photos/6/76/67657/18-dip_300mil__sml.jpg)
PIC16F84A-04/P
Manufacturer Part Number
PIC16F84A-04/P
Description
IC MCU FLASH 1KX14 EE 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC16F84A-04P.pdf
(88 pages)
3.PIC16F84A-04P.pdf
(6 pages)
Specifications of PIC16F84A-04/P
Program Memory Type
FLASH
Program Memory Size
1.75KB (1K x 14)
Package / Case
18-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
13
Eeprom Size
64 x 8
Ram Size
68 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
68 B
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
13
Number Of Timers
1
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3-DB16F84A - BOARD DAUGHTER ICEPIC3DVA16XP180 - ADAPTER DEVICE FOR MPLAB-ICEAC164010 - MODULE SKT PROMATEII DIP/SOIC
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F84A-04/P
Manufacturer:
MICROCHIP
Quantity:
1 450
- Current page: 245 of 688
- Download datasheet (3Mb)
15.4.4
15.4.5
INTCON
PIR
PIE
SSPBUF
SSPADD
SSPCON
SSPSTAT
Legend: x = unknown, u = unchanged, - = unimplemented read as '0'.
Note 1: The positions of these bits are device dependent.
1997 Microchip Technology Inc.
Name
2: These bits may also be named GPIE and GPIF.
Shaded cells are not used by SSP in I
Sleep Operation
Effect of a Reset
Synchronous Serial Port Receive Buffer/Transmit Register
Synchronous Serial Port (I
WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0
Bit 7
SMP
GIE
While in sleep mode, the I
or complete byte transfer occurs wake the processor from sleep (if the SSP interrupt is enabled).
A reset disables the SSP module and terminates the current transfer.
Table 15-3: Registers Associated with I
PEIE
Bit 6
CKE
Bit 5
T0IE
D/A
2
C mode) Address Register
Bit 4
INTE RBIE
P
SSPIE
SSPIF
2
2
C mode.
C module can receive addresses or data, and when an address match
Bit 3
S
(1)
(1)
(2)
Bit 2
T0IF
R/W
2
C Operation
Bit 1
INTF
UA
Section 15. SSP
RBIF
Bit 0
BF
(2)
0000 000x
xxxx xxxx
0000 0000
0000 0000
0000 0000
Value on
POR,
BOR
0
0
DS31015A-page 15-25
other resets
Value on all
0000 000u
uuuu uuuu
0000 0000
0000 0000
0000 0000
0
0
15
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