PIC24FJ64GA006-I/PT Microchip Technology, PIC24FJ64GA006-I/PT Datasheet - Page 53
![IC PIC MCU FLASH 32KX16 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC24FJ64GA006-I/PT
Manufacturer Part Number
PIC24FJ64GA006-I/PT
Description
IC PIC MCU FLASH 32KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ16GA002-ISS.pdf
(52 pages)
2.PIC24FJ64GA006-IPT.pdf
(240 pages)
3.PIC24FJ64GA006-IPT.pdf
(22 pages)
Specifications of PIC24FJ64GA006-I/PT
Program Memory Type
FLASH
Program Memory Size
64KB (22K x 24)
Package / Case
64-TFQFP
Core Processor
PIC
Core Size
16-Bit
Speed
16MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
53
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240011, DV164033, MA240013, AC164127, DM240001
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Controller Family/series
PIC24
No. Of I/o's
53
Ram Memory Size
8KB
Cpu Speed
32MHz
No. Of Timers
5
Embedded Interface Type
I2C, SPI, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240011 - KIT STARTER MPLAB FOR PIC24F MCUDV164033 - KIT START EXPLORER 16 MPLAB ICD2MA160011 - DAUGHTER BOARD PICDEM LCD 16F91XDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ64GA006-I/PT
Manufacturer:
SGS
Quantity:
6 218
Company:
Part Number:
PIC24FJ64GA006-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC24FJ64GA006-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
5.0
The Reset module combines all Reset sources and
controls the device Master Reset Signal, SYSRST. The
following is a list of device Reset sources:
• POR: Power-on Reset
• MCLR: Pin Reset
• SWR: RESET Instruction
• WDT: Watchdog Timer Reset
• BOR: Brown-out Reset
• CM: Configuration Word Mismatch Reset
• TRAPR: Trap Conflict Reset
• IOPUWR: Illegal Opcode Reset
• UWR: Uninitialized W Register Reset
A simplified block diagram of the Reset module is
shown in Figure 5-1.
Any active source of Reset will make the SYSRST sig-
nal active. Many registers associated with the CPU and
peripherals are forced to a known Reset state. Most
registers are unaffected by a Reset; their status is
unknown on POR and unchanged by all other Resets.
FIGURE 5-1:
© 2009 Microchip Technology Inc.
Note:
RESETS
Configuration Word Mismatch Reset
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. Refer to Section 7. “Reset”
(DS39712)
Reference Manual” for more information.
MCLR
V
DD
Enable Voltage Regulator
Uninitialized W Register
RESET SYSTEM BLOCK DIAGRAM
Instruction
RESET
in
Sleep or Idle
Module
Illegal Opcode
the
WDT
Brown-out
V
Trap Conflict
Detect
DD
Reset
Rise
“PIC24F
Glitch Filter
Family
PIC24FJ128GA010 FAMILY
POR
BOR
All types of device Reset will set a corresponding status
bit in the RCON register to indicate the type of Reset
(see Register 5-1). A POR will clear all bits except for
the BOR and POR bits (RCON<1:0>), which are set.
The user may set or clear any bit at any time during
code execution. The RCON bits only serve as status
bits. Setting a particular Reset status bit in software will
not cause a device Reset to occur.
The RCON register also has other bits associated with
the Watchdog Timer and device power-saving states.
The function of these bits is discussed in other sections
of this manual.
Note:
Note:
Refer to the specific peripheral or CPU
section of this manual for register Reset
states.
The status bits in the RCON register
should be cleared after they are read so
that the next RCON register value after a
device Reset will be meaningful.
SYSRST
DS39747E-page 53