DSPIC30F1010-30I/SO Microchip Technology, DSPIC30F1010-30I/SO Datasheet - Page 9

IC DSPIC MCU/DSP 6K 28SOIC

DSPIC30F1010-30I/SO

Manufacturer Part Number
DSPIC30F1010-30I/SO
Description
IC DSPIC MCU/DSP 6K 28SOIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F1010-30I/SO

Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
6KB (2K x 24)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Data Bus Width
16 bit
Processor Series
DSPIC30F
Core
dsPIC
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240002, DM300023, DM330011
Package
28SOIC W
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
30 MHz
Operating Supply Voltage
3.3|5 V
Number Of Programmable I/os
21
Interface Type
I2C/SPI/UART
On-chip Adc
6-chx10-bit
Number Of Timers
2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM300023 - KIT DEMO DSPICDEM SMPS BUCKDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F1010-30I/SO
Manufacturer:
Microchip Technology
Quantity:
135
Part Number:
DSPIC30F1010-30I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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Part Number:
DSPIC30F1010-30I/SO
Quantity:
55
TABLE 5-4:
© 2010 Microchip Technology Inc.
BSS<2:0>
BWRP
GSS<1:0>
GWRP
FNOSC<1:0>
FCKSM<1:0>
FRANGE
OSCIOFNC
POSCMD<1:0>
FWDTEN
WINDIS
Bit Field
CONFIGURATION BITS DESCRIPTION FOR dsPIC30F1010/2020/2023
DEVICES
FOSCSEL
Register
FWDT
FOSC
FOSC
FOSC
FOSC
FWDT
FGS
FGS
FBS
FBS
Boot Segment Program Memory Code Protection
111 = No Boot Segment
110 = Standard security, Small-sized Boot Program Flash
[Boot Segment ends at 0x0003FF]
101 = Standard security, Medium-sized Boot Program Flash
[Boot Segment ends at 0x000FFF
Note: This is for the dsPIC30F2020 and dsPIC30F2023 only.]
100 = No Boot Segment
011 = No Boot Segment
010 = High security, Small-sized Boot Program Flash
[Boot Segment ends at 0x0003FF]
001 = High security, Medium-sized Boot Program Flash
[Boot Segment ends at 0x000FFF
Note: This is for the dsPIC30F2020 and dsPIC30F2023 only.]
000 = No Boot Segment
Boot Segment Program Memory Write Protection
1 = Boot Segment program memory is not write-protected
0 = Boot program memory is write-protected
General Segment Code-Protect bit
11 = Code protection is disabled
10 = Standard security code protection is enabled
0x = Reserved
General Segment Write-Protect bit
1 = General Segment program memory is not write-protected
0 = General Segment program memory is write-protected
Initial Oscillator Source Selection bits
11 = Primary (HS, EC) oscillator with PLL
10 = Primary (HS, EC) oscillator
01 = Internal Fast RC (FRC) oscillator with PLL
00 = Internal Fast RC (FRC) oscillator
Clock Switching Mode bits
1x = Clock switching is disabled, Fail-Safe Clock Monitor is disabled
01 = Clock switching is enabled, Fail-Safe Clock Monitor is disabled
00 = Clock switching is enabled, Fail-Safe Clock Monitor is enabled
Frequency Range Selection for FRC oscillator
1 = High Range: nominal FRC frequency is 14.1 MHz
0 = Low Range: nominal FRC frequency is 9.7 MHz
OSC2 Pin Function bit (except in HS mode)
1 = OSC2 is clock output
0 = OSC2 is general purpose digital I/O pin
Primary Oscillator Mode Select bits
11 = Primary oscillator disabled
10 = HS crystal oscillator mode
01 = Reserved
00 = EC (external clock) mode
Watchdog Enable bit
1 = Watchdog always enabled (LPRC oscillator cannot be disabled.
0 = Watchdog enabled/disabled by user software (LPRC can be
Watchdog Timer Window Enable bit
1 = Watchdog Timer in Non-Window mode
0 = Watchdog Timer in Window mode
Clearing the SWDTEN bit in the RCON register will have no effect)
disabled by clearing the SWDTEN bit in the RCON register)
Description
DS70284C-page 9

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