PIC18F86J50-I/PT Microchip Technology, PIC18F86J50-I/PT Datasheet - Page 144

• Manufacturer Part Number: PIC18F86J50-I/PT
• Description: IC PIC MCU FLASH 32KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F86J50-I/PT

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 65
• Ram Memory Size: 3904Byte
• Cpu Speed: 48MHz
• No. Of Timers: 5
• No. Of: RoHS Compliant
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3904 B
• Interface Type: I2C, MSSP, SPI, EUSART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 65
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183022, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F87J50 FAMILY
TABLE 10-6:
DS39775C-page 144
RB0/FLT0/INT0
RB1/INT1/
PMA4
RB2/INT2/
PMA3
RB3/INT3/
ECCP2/P2A/
PMA2
RB4/KBI0/
PMA1
RB5/KBI1/
PMA0
RB6/KBI2/PGC
RB7/KBI3/PGD
Legend:
Note 1:
Pin Name
2:
O = Output, I = Input, DIG = Digital Output, ST = Schmitt Buffer Input, TTL = TTL Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Alternate assignment for ECCP2/P2A when the CCP2MX Configuration bit is cleared (Extended Microcontroller mode,
80-pin devices only). Default assignment is RC1.
All other pin functions are disabled when ICSP™ or ICD are enabled.
Function
ECCP2
PORTB FUNCTIONS
P2A
PMA4
PMA3
PMA2
PMA1
PMA0
FLT0
INT0
INT1
INT2
INT3
KBI0
KBI1
KBI2
PGC
KBI3
PGD
RB0
RB1
RB2
RB3
RB4
RB5
RB6
RB7
(1)
(1)
Setting
TRIS
0
1
1
1
0
1
1
x
0
1
1
x
0
1
1
0
1
0
x
0
1
x
0
1
x
0
1
1
x
0
1
1
x
x
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Type
DIG
TTL
DIG
TTL
DIG
TTL
DIG
TTL
DIG
DIG
DIG
TTL
TTL
DIG
TTL
TTL
DIG
TTL
TTL
DIG
TTL
TTL
DIG
I/O
ST
ST
ST
ST
ST
ST
ST
ST
—
—
—
—
—
LATB<0> data output.
PORTB<0> data input; weak pull-up when RBPU bit is cleared.
Enhanced PWM Fault input (ECCP1 module); enabled in software.
External interrupt 0 input.
LATB<1> data output.
PORTB<1> data input; weak pull-up when RBPU bit is cleared.
External interrupt 1 input.
Parallel Master Port address out.
LATB<2> data output.
PORTB<2> data input; weak pull-up when RBPU bit is cleared.
External interrupt 2 input.
Parallel Master Port address out.
LATB<3> data output.
PORTB<3> data input; weak pull-up when RBPU bit is cleared.
External interrupt 3 input.
ECCP2 compare output and ECCP2 PWM output; takes priority over port
data.
ECCP2 capture input.
ECCP2 Enhanced PWM output, channel A. May be configured for tri-state
during Enhanced PWM shutdown events. Takes priority over port data.
Parallel Master Port address out.
LATB<4> data output.
PORTB<4> data input; weak pull-up when RBPU bit is cleared.
Interrupt-on-pin change.
Parallel Master Port address out.
LATB<5> data output.
PORTB<5> data input; weak pull-up when RBPU bit is cleared.
Interrupt-on-pin change.
Parallel Master Port address out.
LATB<6> data output.
PORTB<6> data input; weak pull-up when RBPU bit is cleared.
Interrupt-on-pin change.
Serial execution (ICSP™) clock input for ICSP and ICD operation.
LATB<7> data output.
PORTB<7> data input; weak pull-up when RBPU bit is cleared.
Interrupt-on-pin change.
Serial execution data output for ICSP and ICD operation.
Serial execution data input for ICSP and ICD operation.
Description
© 2009 Microchip Technology Inc.
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