PIC16C63A-20/SP Microchip Technology, PIC16C63A-20/SP Datasheet - Page 47

• Manufacturer Part Number: PIC16C63A-20/SP
• Description: IC MCU OTP 4KX14 PWM 28DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C63A-20/SP

• Program Memory Type: OTP
• Program Memory Size: 7KB (4K x 14)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Processor Series: PIC16C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 192 B
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 3
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVMCPA - KIT DVR BOARD EVAL SYSTEM MXDEV1
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

8.0
Timer2 is an 8-bit timer with a prescaler and a
postscaler. It can be used as the PWM time-base for
the PWM mode of the CCP module(s). The TMR2 reg-
ister is readable and writable, and is cleared on any
device RESET.
The input clock (F
1:4,
T2CKPS1:T2CKPS0 (T2CON<1:0>).
The Timer2 module has an 8-bit period register, PR2.
Timer2 increments from 00h until it matches PR2 and
then resets to 00h on the next increment cycle. PR2 is
a readable and writable register. The PR2 register is
initialized to FFh upon RESET.
The match output of TMR2 goes through a 4-bit
postscaler (which gives a 1:1 to 1:16 scaling inclusive)
to generate a TMR2 interrupt (latched in flag bit
TMR2IF, (PIR1<1>)).
Timer2 can be shut-off by clearing control bit TMR2ON
(T2CON<2>) to minimize power consumption.
Register 8-1 shows the Timer2 control register.
Additional information on timer modules is available in
the PICmicro™ Mid-Range MCU Family Reference
Manual (DS33023).
REGISTER 8-1:
2000 Microchip Technology Inc.
or
TIMER2 MODULE
bit 7
bit 6-3
bit 2
bit 1-0
1:16,
OSC
/4) has a prescale option of 1:1,
selected
T2CON: TIMER2 CONTROL REGISTER (ADDRESS 12h)
Unimplemented: Read as '0'
TOUTPS3:TOUTPS0: Timer2 Output Postscale Select bits
0000 = 1:1 Postscale
0001 = 1:2 Postscale
0010 = 1:3 Postscale
•
•
•
1111 = 1:16 Postscale
TMR2ON: Timer2 On bit
1 = Timer2 is on
0 = Timer2 is off
T2CKPS1:T2CKPS0: Timer2 Clock Prescale Select bits
00 = Prescaler is 1
01 = Prescaler is 4
1x = Prescaler is 16
Legend:
R = Readable bit
-n = Value at POR
bit 7
U-0
—
by
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0
R/W-0
control
R/W-0
bits
W = Writable bit
’1’ = Bit is set
PIC16C63A/65B/73B/74B
R/W-0
8.1
The prescaler and postscaler counters are cleared
when any of the following occurs:
• a write to the TMR2 register
• a write to the T2CON register
• any device RESET (POR, BOR, MCLR Reset, or
TMR2 is not cleared when T2CON is written.
8.2
The output of TMR2 (before the postscaler) is fed to the
SSP module, which optionally uses it to generate the
shift clock.
FIGURE 8-1:
WDT Reset)
Note 1: TMR2 register output can be software selected by the
Sets Flag
bit TMR2IF
Postscaler
1:1
T2OUTPS3:
T2OUTPS0
to
Timer2 Prescaler and Postscaler
Output of TMR2
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
R/W-0
SSP module as a baud clock.
1:16
4
TMR2
Output
RESET
EQ
(1)
Comparator
TMR2 reg
R/W-0
TIMER2 BLOCK DIAGRAM
PR2 reg
x = Bit is unknown
R/W-0
1:1, 1:4, 1:16
T2CKPS1:
T2CKPS0
Prescaler
DS30605C-page 47
2
R/W-0
F
OSC
bit 0
/4