PIC24FJ96GA006-I/PT Microchip Technology, PIC24FJ96GA006-I/PT Datasheet - Page 9
![IC PIC MCU FLASH 48KX16 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC24FJ96GA006-I/PT
Manufacturer Part Number
PIC24FJ96GA006-I/PT
Description
IC PIC MCU FLASH 48KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.DV164033.pdf
(50 pages)
2.PIC24FJ16GA002-ISS.pdf
(52 pages)
3.PIC24FJ64GA006-IPT.pdf
(240 pages)
4.PIC24FJ64GA006-IPT.pdf
(22 pages)
Specifications of PIC24FJ96GA006-I/PT
Program Memory Type
FLASH
Program Memory Size
96KB (32K x 24)
Package / Case
64-TFQFP
Core Processor
PIC
Core Size
16-Bit
Speed
16MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
53
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011, DV164033, AC164127, MA240011
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDDM240011 - KIT STARTER MPLAB FOR PIC24F MCUDV164033 - KIT START EXPLORER 16 MPLAB ICD2MA160011 - DAUGHTER BOARD PICDEM LCD 16F91XDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ96GA006-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
19. Module: UART
20. Module: UART
21. Module: UART
© 2009 Microchip Technology Inc.
The timing for transmitting a Sync Break has
changed for this revision of silicon. The Sync
Break is transmitted as soon as the UTXBRK bit is
set. A dummy write to UxTXREG is still required
and must be performed before the Sync Break has
finished transmitting. Otherwise, the UxTX may be
held in the active state until the write has occurred.
Work around
Set the UTXBRK bit when a Sync Break is
required and perform a dummy write to UxTXREG
immediately following. This sequence will avoid
holding the UxTX pin in the active state.
Affected Silicon Revisions
When the UART is in High-Speed mode, BRGH
(UxMODE<3>) is set, some optimal UxBRG
values can cause reception to fail.
Work around
Test UxBRG values in the application to find a
UxBRG value that works consistently for more
high-speed applications. The user should verify
that the UxBRG baud rate error does not exceed
the application limits.
Affected Silicon Revisions
The UTXISEL0 bit (UxSTA<13>) always reads as
zero regardless of the value written to it. The bit can
be written to either a ‘0’ or ‘1’, but will always read
zero. This will affect read-modify-write operations,
such as bit-wise or shift operations. Using a
read-modify-write instruction on the UxSTA register
will always write the UTXISEL0 bit to zero.
Work around
If a UTXISEL0 value of ‘1’ is needed, avoid using
read-modify-write instructions on the UxSTA
register. Copy the UxSTA register to a temporary
variable and set UxSTA<13> prior to performing
read-modify-write operations. Copy the new value
back to the UxSTA register.
Affected Silicon Revisions
A2
A2
A2
X
X
X
A3
A3
A3
X
X
A4
A4
A4
X
X
C1
C1
C1
C2
C2
C2
PIC24FJ128GA010 FAMILY
22. Module: UART
23. Module: UART (Hardware Flow Control)
24. Module: UART
When UTXISEL<1:0> = 10, a UART interrupt flag
should be set after one byte from the FIFO is
transferred to the Transmit Shift Register (TSR).
Instead, the interrupt flag may be set only after all
bytes are transferred from the FIFO and the FIFO
is empty. This behavior is similar to the
UTXISEL<1:0> = 00 mode.
Work around
None.
Affected Silicon Revisions
UART1 and UART2 hardware flow control options
are not available for the 64-pin variants of the
PIC24F128GA010 product family. As a result, the
UxCTS and UxRTS pins are not available and the
UEN<1:0> control bits are read as ‘0’ (unimple-
mented). UART2 hardware flow control is not
available for the 80-pin PIC24F128GA010 family
variants. Associated pins and bits are not available
for these devices.
Work around
None.
Affected Silicon Revisions
When the UART is in High-Speed mode
(BRGH = 1),
calculate the baud rate as if it were in Low-Speed
mode.
Work around
The calculated baud rate can be modified by the
following equation:
The user should verify that the baud rate error does
not exceed application limits.
Affected Silicon Revisions
A2
A2
A2
X
X
X
New BRG Value = (Auto-Baud BRG + 1) * 4 • 1
A3
A3
A3
X
X
A4
A4
A4
X
X
the
C1
C1
C1
auto-baud
C2
C2
C2
DS80471A-page 9
sequence
can