DSPIC30F3010-30I/SP Microchip Technology, DSPIC30F3010-30I/SP Datasheet - Page 13
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DSPIC30F3010-30I/SP
Manufacturer Part Number
DSPIC30F3010-30I/SP
Description
IC DSPIC MCU/DSP 24K 28DIP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F3010-30ISO.pdf
(228 pages)
2.DSPIC30F3010-30ISO.pdf
(18 pages)
3.DSPIC30F3010-30ISO.pdf
(6 pages)
4.DSPIC30F3010-30ISO.pdf
(16 pages)
5.DSPIC30F3010-30ISO.pdf
(22 pages)
6.DSPIC30F3014-30IP.pdf
(244 pages)
Specifications of DSPIC30F3010-30I/SP
Program Memory Type
FLASH
Program Memory Size
24KB (8K x 24)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
20
Eeprom Size
1K x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC30F
Core
dsPIC
Maximum Clock Frequency
30 MHz
Number Of Programmable I/os
20
Data Ram Size
1 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300027, DM330011, DM300018, DM183021
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F301030ISP
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F3010-30I/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
22. Module: I/O Port – Port Pin Multiplexed
23. Module: ADC Offset Error When Using
24. Module: Motor Control PWM – PWM
© 2008 Microchip Technology Inc.
If the user application enables the auto-baud
feature in the UART module, the I/O pin
multiplexed with the IC1 (Input Capture) pin cannot
be used as a digital input.
Work around
None.
If the user application uses the internal reference
voltage (AV
greater than what is specified in the device data
sheet.
Work around
As an alternative, use the external reference
voltage (V
If the PTDIR bit is set (when PTMR is counting
down), and the CPU execution is halted (after a
breakpoint is reached), PTMR will start counting
up as if PTDIR was zero.
Work around
None.
REF
with IC1
Internal Reference (AV
Counter Register
DD
-, V
, AV
REF
SS
), the ADC has an offset error
+).
DD
, AV
SS
)
25. Module: Timer
26. Module: PLL Lock Status Bit
dsPIC30F3010/3011
When the timer is being operated in Asynchronous
mode using the secondary oscillator (32.768 kHz)
and the device is put into Sleep mode, a clock
switch to any other oscillator mode before putting
the device to Sleep prevents the timer from waking
the device from Sleep.
Work around
Do not clock switch to any other oscillator mode if
the timer is being used in Asynchronous mode
using the secondary oscillator (32.768 kHz).
The PLL LOCK Status bit (OSCCON<5>) can
occasionally get cleared and generate an
oscillator failure trap even when the PLL is still
locked and functioning correctly.
Work around
The user application must include an oscillator
failure trap service routine. In the trap service
routine, first inspect the status of the Clock Failure
Status bit (OSCCON<3>). If this bit is clear, return
from the trap service routine immediately and
continue program execution.
DS80389B-page 13