DSPIC30F3010-20I/SP Microchip Technology, DSPIC30F3010-20I/SP Datasheet - Page 221

• Manufacturer Part Number: DSPIC30F3010-20I/SP
• Description: IC DSPIC MCU/DSP 24K 28DIP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F3010-20I/SP

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 24KB (8K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 20
• Flash Memory Size: 24KB
• Supply Voltage Range: 2.5V To 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DSPIC30F301020ISP

Timing Diagrams and Specifications
Timing Diagrams.See Timing Characteristics.
Timing Requirements
Timing Specifications
Trap Vectors ....................................................................... 44
© 2008 Microchip Technology Inc.
I
Input Capture (CAPx)................................................ 182
Motor Control PWM Module...................................... 184
Motor Control PWM Module Fault............................. 184
OCx/PWM Module .................................................... 183
Oscillator Start-up Timer ........................................... 177
Output Compare Module........................................... 182
PWM Output ............................................................... 85
QEA/QEB Inputs ....................................................... 185
QEI Module Index Pulse ........................................... 186
Reset......................................................................... 177
SPI Module
Time-out Sequence on Power-up
Time-out Sequence on Power-up
Time-out Sequence on Power-up
Timer1, 2, 3, 4, 5 External Clock............................... 179
TimerQ (QEI Module) External Clock ....................... 181
DC Characteristics - Internal
A/D Conversion
Band Gap Start-up Time ........................................... 178
Brown-out Reset ....................................................... 177
CLKOUT and I/O....................................................... 176
External Clock........................................................... 172
I
I
Input Capture ............................................................ 182
Motor Control PWM Module...................................... 184
Oscillator Start-up Timer ........................................... 177
Output Compare Module........................................... 182
Power-up Timer ........................................................ 177
QEI Module
Quadrature Decoder ................................................. 185
Reset......................................................................... 177
Simple OCx/PWM Mode ........................................... 183
SPI Module
Timer1 External Clock............................................... 179
Timer3 and Timer5 External Clock ........................... 180
Watchdog Timer........................................................ 177
PLL Clock.................................................................. 173
2
2
2
C Bus Start/Stop Bits
C Bus Data (Master Mode)..................................... 193
C Bus Data (Slave Mode)....................................... 194
Master Mode ..................................................... 192
Slave Mode ....................................................... 194
Master Mode (CKE = 0) .................................... 187
Master Mode (CKE = 1) .................................... 188
Slave Mode (CKE = 1) ...................................... 190
(MCLR Not Tied to V
(MCLR Not Tied to V
(MCLR Tied to V
RC Accuracy ..................................................... 174
10-Bit High-Speed ............................................ 200
External Clock................................................... 181
Index Pulse ....................................................... 186
Master Mode (CKE = 0) .................................... 187
Master Mode (CKE = 1) .................................... 188
Slave Mode (CKE = 0) ...................................... 189
Slave Mode (CKE = 1) ...................................... 191
DD
).......................................... 144
DD
DD
), Case 1...................... 144
), Case 2...................... 144
U
UART
Unit ID Locations .............................................................. 137
Universal Asynchronous Receiver
W
Wake-up from Sleep ......................................................... 137
Wake-up from Sleep and Idle ............................................. 45
Watchdog Timer
Watchdog Timer (WDT)............................................ 137, 147
WWW Address ................................................................. 220
WWW, On-Line Support ....................................................... 6
dsPIC30F3010/3011
Address Detect Mode ............................................... 121
Auto Baud Support ................................................... 122
Baud Rate Generator ............................................... 121
Enabling and Setting Up UART ................................ 119
Loopback Mode ........................................................ 121
Module Overview...................................................... 117
Operation During CPU Sleep and Idle Modes.......... 122
Receiving Data ......................................................... 120
Reception Error Handling ......................................... 120
Transmitting Data ..................................................... 119
UART1 Register Map ............................................... 123
UART2 Register Map ............................................... 123
Transmitter Module (UART) ..................................... 117
Timing Characteristics .............................................. 177
Timing Requirements ............................................... 177
Enabling and Disabling............................................. 147
Operation.................................................................. 147
Alternate I/O ..................................................... 119
Disabling........................................................... 119
Enabling ........................................................... 119
Setting Up Data, Parity and
In 8-Bit or 9-Bit Data Mode ............................... 120
Interrupt ............................................................ 120
Receive Buffer (UxRXB)................................... 120
Framing Error (FERR) ...................................... 121
Idle Status ........................................................ 121
Parity Error (PERR) .......................................... 121
Receive Break .................................................. 121
Receive Buffer Overrun Error
In 8-Bit Data Mode............................................ 119
In 9-Bit Data Mode............................................ 119
Interrupt ............................................................ 120
Transmit Buffer (UxTXB) .................................. 119
Stop Bit Selections ................................... 119
(OERR Bit) ............................................... 120
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