PIC18LF2420-I/ML Microchip Technology, PIC18LF2420-I/ML Datasheet - Page 355

• Manufacturer Part Number: PIC18LF2420-I/ML
• Description: IC PIC MCU FLASH 8KX16 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF2420-I/ML

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC18
• No. Of I/o's: 25
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Package: 28QFN EP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 25
• Interface Type: I2C/SPI/USART
• On-chip Adc: 10-chx10-bit
• Number Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

FIGURE 26-17:
TABLE 26-18: I
FIGURE 26-18:
© 2008 Microchip Technology Inc.
90
91
92
93
Param.
SCL
Note:
SDA
No.
Note:
SDA
Out
SDA
In
Refer to Figure 26-5 for load conditions.
SCL
T
T
T
T
Symbol
SU
SU
HD
HD
:
:
:
:
STA
STO
STA
STO
Refer to Figure 26-5 for load conditions.
2
90
C™ BUS START/STOP BITS REQUIREMENTS (SLAVE MODE)
Start Condition
Setup Time
Start Condition
Hold Time
Stop Condition
Setup Time
Stop Condition
Hold Time
Condition
I
I
90
2
2
C™ BUS START/STOP BITS TIMING
C™ BUS DATA TIMING
Start
103
91
91
Characteristic
109
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
PIC18F2420/2520/4420/4520
100
106
101
109
107
4000
4700
4700
4000
Min
600
600
600
600
Max
—
—
—
—
—
—
—
—
Units
ns
ns
ns
ns
92
Condition
Only relevant for Repeated
Start condition
After this period, the first
clock pulse is generated
92
Stop
102
93
Conditions
110
DS39631E-page 353