PIC16F84A-20I/SO Microchip Technology, PIC16F84A-20I/SO Datasheet - Page 134
![IC MCU FLASH 1KX14 EE 18SOIC](/photos/6/76/67656/150-18-soic_sml.jpg)
PIC16F84A-20I/SO
Manufacturer Part Number
PIC16F84A-20I/SO
Description
IC MCU FLASH 1KX14 EE 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC16F84A-04P.pdf
(88 pages)
3.PIC16F84A-04P.pdf
(6 pages)
Specifications of PIC16F84A-20I/SO
Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Core Processor
PIC
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
13
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
68 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
18-SOIC (7.5mm Width)
Controller Family/series
PIC16F
No. Of I/o's
13
Eeprom Memory Size
64Byte
Ram Memory Size
68Byte
Cpu Speed
20MHz
No. Of Timers
1
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
68 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
13
Number Of Timers
8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3-DB16F84A - BOARD DAUGHTER ICEPIC3309-1075 - ADAPTER 18-SOIC TO 18-SOIC309-1011 - ADAPTER 18-SOIC TO 18-DIP309-1010 - ADAPTER 18-SOIC TO 18-DIPDVA12XP080 - ADAPTER DEVICE FOR MPLAB-ICEAC164010 - MODULE SKT PROMATEII DIP/SOIC
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F84A-20I/SO
Manufacturer:
AD
Quantity:
670
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- Download datasheet (3Mb)
PICmicro MID-RANGE MCU FAMILY
DS31008A-page 8-12
Example 8-2
(such as the PIC16C74A). The user register, W_TEMP, must be defined across all banks and
must be defined at the same offset from the bank base address (i.e., W_TEMP is defined at 0x70
- 0x7F in Bank0). The user register, STATUS_TEMP, must be defined in Bank0.
Within the 70h - 7Fh range (Bank0), wherever W_TEMP is expected the corresponding locations
in the other banks should be dedicated for the possible saving of the W register.
The steps of
1.
2.
3.
4.
5.
If additional locations need to be saved before executing the Interrupt Service Routine (ISR)
code, they should be saved after the STATUS register is saved (step 2), and restored before the
STATUS register is restored (step 4).
Example 8-2: Saving the STATUS and W Registers in RAM
Stores the W register regardless of current bank.
Stores the STATUS register in Bank0.
Executes the Interrupt Service Routine (ISR) code.
Restores the STATUS (and bank select bit register).
Restores the W register.
MOVWF
SWAPF
BCF
MOVWF
:
: (Interrupt Service Routine (ISR) )
:
SWAPF
MOVWF
SWAPF
SWAPF
Example
stores and restores the STATUS and W registers for devices without common RAM
(for Devices without Common RAM)
W_TEMP
STATUS,W
STATUS,RP0
STATUS_TEMP
STATUS_TEMP,W
STATUS
W_TEMP,F
W_TEMP,W
8-2:
; Copy W to a Temporary Register
;
; Swap STATUS nibbles and place
;
; Change to Bank0 regardless of
;
; Save STATUS to a Temporary register
;
; Swap original STATUS register value
;
; Restore STATUS register from
;
; Swap W_Temp nibbles and return
;
; Swap W_Temp to W to restore original
;
regardless of current bank
into W register
current bank
in Bank0
into W (restores original bank)
W register
value to W_Temp
W value without affecting STATUS
1997 Microchip Technology Inc.
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