DSPIC30F3014-30I/ML Microchip Technology, DSPIC30F3014-30I/ML Datasheet - Page 160
![IC DSPIC MCU/DSP 24K 44QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
DSPIC30F3014-30I/ML
Manufacturer Part Number
DSPIC30F3014-30I/ML
Description
IC DSPIC MCU/DSP 24K 44QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F3014-30IPT.pdf
(228 pages)
2.DSPIC30F3014-30IPT.pdf
(16 pages)
3.DSPIC30F3014-30IPT.pdf
(6 pages)
4.DSPIC30F3014-30IPT.pdf
(14 pages)
5.DSPIC30F3014-30IPT.pdf
(20 pages)
Specifications of DSPIC30F3014-30I/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
30
Program Memory Size
24KB (8K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 13x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
For Use With
XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DSPIC30F301430IML
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F3014-30I/ML
Manufacturer:
Microchip Technology
Quantity:
135
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dsPIC30F3014/4013
Most single-word instructions are executed in a single
instruction cycle, unless a conditional test is true or
the program counter is changed as a result of the
instruction. In these cases, the execution takes two
instruction cycles with the additional instruction
cycle(s) executed as a NOP. Notable exceptions are the
BRA (unconditional/computed branch), indirect CALL/
GOTO, all table reads and writes, and RETURN/RETFIE
instructions, which are single-word instructions but take
two or three cycles. Certain instructions that involve
skipping over the subsequent instruction require either
TABLE 21-1:
DS70138G-page 160
#text
(text)
[text]
{ }
<n:m>
.b
.d
.S
.w
Acc
AWB
bit4
C, DC, N, OV, Z
Expr
f
lit1
lit4
lit5
lit8
lit10
lit14
lit16
lit23
None
OA, OB, SA, SB
PC
Slit10
Slit16
Slit6
Field
SYMBOLS USED IN OPCODE DESCRIPTIONS
Means literal defined by “text”
Means “content of text”
Means “the location addressed by text”
Optional field or operation
Register bit field
Byte mode selection
Double-Word mode selection
Shadow register select
Word mode selection (default)
One of two accumulators {A, B}
Accumulator Write-Back Destination Address register {W13, [W13]+=2}
4-bit bit selection field (used in word addressed instructions) {0...15}
MCU Status bits: Carry, Digit Carry, Negative, Overflow, Sticky Zero
Absolute address, label or expression (resolved by the linker)
File register address {0x0000...0x1FFF}
1-bit unsigned literal {0,1}
4-bit unsigned literal {0...15}
5-bit unsigned literal {0...31}
8-bit unsigned literal {0...255}
10-bit unsigned literal {0...255} for Byte mode, {0:1023} for Word mode
14-bit unsigned literal {0...16384}
16-bit unsigned literal {0...65535}
23-bit unsigned literal {0...8388608}; LSB must be 0
Field does not require an entry, may be blank
DSP Status bits: AccA Overflow, AccB Overflow, AccA Saturate, AccB Saturate
Program Counter
10-bit signed literal {-512...511}
16-bit signed literal {-32768...32767}
6-bit signed literal {-16...16}
two or three cycles if the skip is performed, depending
on whether the instruction being skipped is a single-
word or two-word instruction. Moreover, double-word
moves
instructions execute in two instruction cycles.
Note:
Description
require
For more details on the instruction set,
refer to the “16-bit DSC and MCU Pro-
grammer’s
(DS70157).
two
2010 Microchip Technology Inc.
cycles.
Reference
The
double-word
Manual”
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