DSPIC30F3014-20I/ML Microchip Technology, DSPIC30F3014-20I/ML Datasheet - Page 11

• Manufacturer Part Number: DSPIC30F3014-20I/ML
• Description: IC DSPIC MCU/DSP 24K 44QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F3014-20I/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 30
• Program Memory Size: 24KB (8K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 30
• Flash Memory Size: 24KB
• Supply Voltage Range: 2.5V To 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F301420IML

1.0
FIGURE 1-1:
© 2008 Microchip Technology Inc.
Note:
Program Memory
Controller
Address Latch
Data EEPROM
Interrupt
Data Latch
(24 Kbytes)
Control Signals
OSC1/CLKI
(1 Kbyte)
DEVICE OVERVIEW
This data sheet summarizes features of
this group of dsPIC30F devices and is not
intended to be a complete reference
source. For more information on the CPU,
peripherals, register descriptions and gen-
eral device functionality, refer to the
“dsPIC30F Family Reference Manual”
(DS70046). For more information on the
device instruction set and programming,
refer to the “dsPIC30F/33F Programmer’s
Reference Manual” (DS70157).
to Various Blocks
24
Generation
Decode and
Instruction
Timing
Control
AV
16
V
dsPIC30F3014 BLOCK DIAGRAM
MCLR
DD
DD
24
24
, V
, AV
Control Block
Data Access
PSV & Table
24
12-Bit ADC
SS
SS
Timers
16
Control
Start-up Timer
Stack
Low-Voltage
Logic
PCU
Program Counter
POR/BOR
Watchdog
Power-up
Oscillator
Y Data Bus
Detect
Reset
Timer
Timer
8
ROM Latch
PCH
Capture
Module
Input
IR
DCI
Control
Logic
Loop
16
PCL
Decode
16
Engine
16
DSP
Compare
Module
Output
SPI1
Data Latch
(1 Kbyte)
Y AGU
Address
Y Data
Effective Address
Latch
RAM
16
16
16
W Reg Array
16
16 x 16
ALU<16>
16
16
16
X RAGU
X WAGU
X Data Bus
16
Data Latch
Divide
This document contains specific information for the
dsPIC30F3014/4013 Digital Signal Controller (DSC)
devices. The dsPIC30F3014/4013 devices contain
extensive Digital Signal Processor (DSP) functionality
within a high-performance, 16-bit microcontroller
(MCU) architecture. Figure 1-1 and Figure 1-2 show
device block diagrams for dsPIC30F3014 and
dsPIC30F4013, respectively.
(1 Kbyte)
UART1,
UART2
Address
Unit
X Data
I
Latch
2
RAM
C™
dsPIC30F3014/4013
16
16
16
16
PORTB
PORTA
PORTC
PORTF
PORTD
RF0
OSC2/CLKO/RC15
RF1
U1RX/SDI1/SDA/RF2
EMUD3/U1TX/SDO1/SCL/RF3
U2RX/CN17/RF4
U2TX/CN18/RF5
EMUC3/SCK1/RF6
AN0/V
AN1/V
AN2/SS1/LVDIN/CN4/RB2
AN3/CN5/RB3
AN4/CN6/RB4
AN5/CN7/RB5
PGC/EMUC/AN6/OCFA/RB6
PGD/EMUD/AN7/RB7
AN8/RB8
AN9/RB9
AN10/RB10
AN11/RB11
AN12/RB12
EMUD1/SOSCI/T2CK/U1ATX/
CN1/RC13
EMUC2/OC1/RD0
EMUD2/OC2/RD1
RD2
RD3
IC1/INT1/RD8
IC2/INT2/RD9
INT0/RA11
EMUC1/SOSCO/T1CK/U1ARX/
CN0/RC14
REF
REF
+/CN2/RB0
-/CN3/RB1
DS70138F-page 9