PIC16F84-04/P Microchip Technology, PIC16F84-04/P Datasheet - Page 308

• Manufacturer Part Number: PIC16F84-04/P
• Description: IC MCU FLASH 1KX14 EE 18DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F84-04/P

• Program Memory Type: FLASH
• Program Memory Size: 1.75KB (1K x 14)
• Package / Case: 18-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 13
• Eeprom Size: 64 x 8
• Ram Size: 68 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 68 B
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 13
• Number Of Timers: 1
• Operating Supply Voltage: 2 V to 6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA16XP180 - ADAPTER DEVICE FOR MPLAB-ICEAC164010 - MODULE SKT PROMATEII DIP/SOIC
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PICmicro MID-RANGE MCU FAMILY
17.4.9
17.4.9.1
DS31017A-page 17-32
I
WCOL Status Flag
2
C Master Mode Start Condition Timing
To initiate a START condition the user sets the start condition enable bit, SEN (SSPCON2<0>).
If the SDA and SCL pins are sampled high, the baud rate generator is re-loaded with the contents
of SSPADD<6:0>, and starts its count. If SCL and SDA are both sampled high when the baud
rate generator times out (T
low while SCL is high is the START condition, and causes the S bit (SSPSTAT<3>) to be set. Fol-
lowing this, the baud rate generator is reloaded with the contents of SSPADD<6:0> and resumes
its count. When the baud rate generator times out (T
automatically cleared by hardware, the baud rate generator is suspended leaving the SDA line
held low, and the START condition is complete.
If the user writes the SSPBUF when an START sequence is in progress, then WCOL is set and
the contents of the buffer are unchanged (the write doesn’t occur).
Figure 17-20: First Start Bit Timing
Note:
Note:
Write to SEN bit occurs here.
If at the beginning of START condition the SDA and SCL pins are already sampled
low, or if during the START condition the SCL line is sampled low before the SDA
line is driven low, a bus collision occurs, the Bus Collision Interrupt Flag,BCLIF, is
set, the START condition is aborted, and the I
Because queueing of events is not allowed, writing to the lower 5 bits of SSPCON2
is disabled until the START condition is complete.
SDA
SCL
BRG
Preliminary
), the SDA pin is driven low. The action of the SDA being driven
SDA = 1,
SCL = 1
T
BRG
Set S bit (SSPSTAT<3>)
S
T
BRG
At completion of start bit,
Hardware clears SEN bit
BRG
and sets SSPIF bit
2
) the SEN bit (SSPCON2<0>) will be
C module is reset into its IDLE state.
T
Write to SSPBUF occurs here
BRG
1st Bit
1997 Microchip Technology Inc.
T
BRG
2nd Bit