PIC16LF873A-I/SP Microchip Technology, PIC16LF873A-I/SP Datasheet - Page 37

• Manufacturer Part Number: PIC16LF873A-I/SP
• Description: IC MCU FLASH 4KX14 EE A/D 28DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16LF873A-I/SP

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Oscillator Type: External
• Core Processor: PIC
• Speed: 10MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Controller Family/series: PIC16LF
• No. Of I/o's: 22
• Eeprom Memory Size: 128Byte
• Ram Memory Size: 192Byte
• Cpu Speed: 20MHz
• No.: RoHS Compliant
• Processor Series: PIC16LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 192 B
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PIC16LF873AI/SP

3.3
To read a data memory location, the user must write the
address to the EEADR register, clear the EEPGD con-
trol bit (EECON1<7>) and then set control bit RD
(EECON1<0>). The data is available in the very next
cycle in the EEDATA register; therefore, it can be read
in the next instruction (see Example 3-1). EEDATA will
hold this value until another read or until it is written to
by the user (during a write operation).
The steps to reading the EEPROM data memory are:
1.
2.
3.
4.
EXAMPLE 3-1:
3.4
To write an EEPROM data location, the user must first
write the address to the EEADR register and the data to
the EEDATA register. Then the user must follow a
specific write sequence to initiate the write for each byte.
The write will not initiate if the write sequence is not
exactly followed (write 55h to EECON2, write AAh to
EECON2, then set WR bit) for each byte. We strongly
recommend that interrupts be disabled during this
code segment (see Example 3-2).
Additionally, the WREN bit in EECON1 must be set to
enable write. This mechanism prevents accidental
writes to data EEPROM due to errant (unexpected)
code execution (i.e., lost programs). The user should
keep the WREN bit clear at all times, except when
updating EEPROM. The WREN bit is not cleared
by hardware
After a write sequence has been initiated, clearing the
WREN bit will not affect this write cycle. The WR bit will
be inhibited from being set unless the WREN bit is set.
At the completion of the write cycle, the WR bit is
cleared in hardware and the EE Write Complete
Interrupt Flag bit (EEIF) is set. The user can either
enable this interrupt or poll this bit. EEIF must be
cleared by software.
 2003 Microchip Technology Inc.
Write the address to EEADR. Make sure that the
address is not larger than the memory size of
the device.
Clear the EEPGD bit to point to EEPROM data
memory.
Set the RD bit to start the read operation.
Read the data from the EEDATA register.
BSF
BCF
MOVF
MOVWF
BSF
BCF
BSF
BCF
MOVF
Reading Data EEPROM Memory
Writing to Data EEPROM Memory
STATUS,RP1
STATUS,RP0
DATA_EE_ADDR,W ; Data Memory
EEADR
STATUS,RP0
EECON1,EEPGD
EECON1,RD
STATUS,RP0
EEDATA,W
DATA EEPROM READ
;
; Bank 2
; Address to read
; Bank 3
; Point to Data
; memory
; EE Read
; Bank 2
; W = EEDATA
The steps to write to EEPROM data memory are:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. At the completion of the write cycle, the WR bit
EXAMPLE 3-2:
If step 10 is not implemented, check the WR bit
to see if a write is in progress.
Write the address to EEADR. Make sure that the
address is not larger than the memory size of
the device.
Write the 8-bit data value to be programmed in
the EEDATA register.
Clear the EEPGD bit to point to EEPROM data
memory.
Set the WREN bit to enable program operations.
Disable interrupts (if enabled).
Execute the special five instruction sequence:
• Write 55h to EECON2 in two steps (first
• Write AAh to EECON2 in two steps (first
• Set the WR bit
Enable interrupts (if using interrupts).
Clear the WREN bit to disable program
operations.
is cleared and the EEIF interrupt flag bit is set.
(EEIF must be cleared by firmware.) If step 1 is
not implemented, then firmware should check
for EEIF to be set, or WR to clear, to indicate the
end of the program cycle.
BSF
BSF
BTFSC EECON1,WR
GOTO
BCF
MOVF
MOVWF EEADR
MOVF
MOVWF EEDATA
BSF
BCF
BSF
BCF
MOVLW 55h
MOVWF EECON2
MOVLW AAh
MOVWF EECON2
BSF
BSF
BCF
to W, then to EECON2)
to W, then to EECON2)
STATUS,RP1
STATUS,RP0
$-1
STATUS, RP0
DATA_EE_ADDR,W ;Data Memory
DATA_EE_DATA,W ;Data Memory Value
STATUS,RP0
EECON1,EEPGD
EECON1,WREN
INTCON,GIE
EECON1,WR
INTCON,GIE
EECON1,WREN
PIC16F87XA
DATA EEPROM WRITE
;
;Wait for write
;to complete
;Bank 2
;Address to write
;to write
;Bank 3
;Point to DATA
;memory
;Enable writes
;Disable INTs.
;
;Write 55h
;
;Write AAh
;Set WR bit to
;begin write
;Enable INTs.
;Disable writes
DS39582B-page 35