PIC18LF2431-I/SO Microchip Technology, PIC18LF2431-I/SO Datasheet - Page 2
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PIC18LF2431-I/SO
Manufacturer Part Number
PIC18LF2431-I/SO
Description
IC MCU FLASH 8KX16 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16LF627A-IP.pdf
(8 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC18F2331-ISO.pdf
(392 pages)
5.PIC18F2331-ISO.pdf
(8 pages)
6.PIC18F2331-ISO.pdf
(6 pages)
7.PIC18F2331-ISO.pdf
(16 pages)
8.PIC18LF2331-ISO.pdf
(4 pages)
9.PIC18LF2331-ISO.pdf
(40 pages)
10.PIC18F4331-EP.pdf
(400 pages)
Specifications of PIC18LF2431-I/SO
Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
24
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
EUSART, I2C, SPI, SSP
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
24
Number Of Timers
1 x 8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM183021, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF2431-I/SO
Manufacturer:
BOURNS
Quantity:
30 000
PIC18F2331/2431/4331/4431
4. Module: PCPWM
5. Module: PCPWM
6. Module: PCPWM
DS80180C-page 2
When the PCPWM is operated in Center-Aligned
mode with double updates and the duty cycle
alternates on each update between a zero and
non-zero value, an incorrect waveform is gener-
ated (the PWM output will alternate between one
PWM period high and one PWM period low). If in
Complementary mode, dead time will not be
inserted properly.
Work around
Do not use zero duty cycle when in Center-Aligned
mode with double updates. Instead of zero, set the
duty cycle to a small, non-zero value.
Date Codes that pertain to this issue:
All engineering and production devices.
When the PCPWM is operated in Center-Aligned
mode with double updates and the duty cycle
alternates on each update between a greater than
100% duty cycle and a non-zero value, an incorrect
waveform is generated.
Work around
Do not use equal to or greater than 100% duty cycle
when in Center-Aligned mode with double updates.
Ensure that the maximum duty cycle value is
always smaller than or equal to the PWM period,
i.e., PDCH:PDCL ≤ (4 * (PTPERH:PTPERL)).
Date Codes that pertain to this issue:
All engineering and production devices.
If dead-time insertion is enabled and it is a non-
zero value, glitches in the PWM output will occur
under the following conditions:
1. When the PWM Timer is stopped by clearing
2. When the duty cycle is changed to zero.
Work around
1. Before disabling the PWM timer, ensure that
2. Do not use zero duty cycle when dead-time
Date Codes that pertain to this issue:
All engineering and production devices.
the PTEN bit.
PORTB is set up to maintain a safe state of
external hardware and that TRISB is set up to
define the pins as outputs.
insertion is enabled. Instead of zero, set the
duty cycle to a small, non-zero value (such as
‘1’).
7. Module: PCPWM
8. Module: PCPWM
9. Module: Data EEPROM
The PTMRH register will read as ‘00’ or the last
value written to it, even though the upper four bits
of the PWM timer may be different. Writing to
PTMRH will effect the upper four bits of the PWM
timer when PTMRL is subsequently written.
Although the PWM timer operates correctly, the
double-buffer circuit does not transfer data to the
PTMRH register from the upper four bits of the
PWM timer.
Work around
PWM operation is not affected. Do not attempt to
read PTMRH.
Date Codes that pertain to this issue:
All engineering and production devices.
In Complementary mode with dead-time insertion,
when using OVDCOND and OVDCONS to
override the PWM outputs, dead time is not
inserted correctly when the dead-time prescaler is
F
Work around
None. Use dead-time prescaler of F
circumstances.
Date Codes that pertain to this issue:
All engineering and production devices.
When writing to the data EEPROM, the contents of
the data EEPROM memory may not be written as
expected if the internal voltage reference is not
enabled.
Work around
Either of two work arounds can be used:
1. Before beginning any writes to the data
2. Configure the BOR as enabled (any voltage).
OSC
EEPROM, enable the LVD (any voltage) and
wait for the internal voltage reference to
become stable. LVD interrupt requests may be
ignored. Once the LVD voltage reference is
stable, perform all EEPROM writes normally.
When writes have been completed, the LVD
may be disabled.
Select a threshold below V
operation. If V
the device will be held in Brown-out Reset.
/4, F
OSC
/8 or F
DD
© 2005 Microchip Technology Inc.
OSC
is below the BOR threshold,
/16.
DD
to allow normal
OSC
/2 in these