PIC24HJ128GP202-I/SP Microchip Technology, PIC24HJ128GP202-I/SP Datasheet - Page 3
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PIC24HJ128GP202-I/SP
Manufacturer Part Number
PIC24HJ128GP202-I/SP
Description
IC PIC MCU FLASH 128K 28DIP
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ32GP302-ISO.pdf
(368 pages)
3.PIC24HJ32GP302-ISO.pdf
(8 pages)
4.PIC24HJ32GP302-ISO.pdf
(12 pages)
5.PIC24HJ32GP304-EML.pdf
(356 pages)
Specifications of PIC24HJ128GP202-I/SP
Program Memory Type
FLASH
Program Memory Size
128KB (43K x 24)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
21
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM300027
Minimum Operating Temperature
- 40 C
On-chip Adc
10-ch x 10-bit or 10-ch x 12-bit
Controller Family/series
PIC24
No. Of I/o's
21
Ram Memory Size
8KB
Cpu Speed
40MIPS
No. Of Timers
7
Embedded Interface Type
I2C, SPI, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164337 - MODULE SOCKET FOR PM3 40DIP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
TABLE 2:
© 2010 Microchip Technology Inc.
Note 1:
Comparator
Operations
Regulator
Module
Internal
Voltage
ECAN
ECAN
RTCC
UART
UART
JTAG
CPU
ADC
PSV
SPI
All
Only those issues indicated in the last column apply to the current silicon revision.
Consumption
During Reset
Sleep Mode
Sleep Mode
SILICON ISSUE SUMMARY (CONTINUED)
Generation
Output Pin
Instruction
Operation
Operation
Character
Operation
Operation
Boundary
Transmit
IR Mode
Feature
Receive
in Sleep
Current
150ºC
Break
Mode
EXCH
Scan
—
Number
Item
12.
13.
14.
15.
16.
17.
18.
19.
20.
21.
22.
23.
24.
When the UART module is operating in 8-bit mode
(PDSEL = 0x) and using the IrDA
(IREN = 1), the module incorrectly transmits a data
payload of 80h as 00h.
When CMCON<CxOUTEN> is set, the Comparator out-
put pin cannot be used as a general purpose I/O pin even
if the Comparator is disabled.
When the VREGS bit (RCON<8>) is set to a logic ‘0’ the
device may reset and higher Sleep current may be
observed.
An address error trap occurs in certain addressing modes
when accessing the first four bytes of any PSV page.
The WAKIF bit in the CxINTF register cannot be cleared
by software instruction after the device is interrupted from
Sleep due to activity on the CAN bus.
The ECAN module may not store the received data in the
correct location.
The EXCH instruction does not execute correctly.
Writing to the SPIxBUF register as soon as TBF bit is
cleared will cause the SPI module to ignore written data.
The UART module will not generate back-to-back Break
characters.
If the ADC module is in an enabled state when the device
enters Sleep Mode, the power-down current (I
device may exceed the device data sheet specifications.
On 28-pin devices, JTAG Boundary Scan does not function
correctly for pin 7. Both pins 6 and 7 respond to stimulus
applied to pin 7.
The RTCC module gets reset on any device Reset,
instead of getting reset only on a POR or BOR.
These revisions of silicon only support 140ºC operation
instead of 150ºC for Hi-Temp operating temperature.
Issue Summary
®
encoder/decoder
PD
) of the
A1 A2 A3 A4
X
X
X
X
X
X
X
X
X
X
X
X
X
DS80441F-page 3
Revisions
Affected
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
(1)
X
X
X
X
X
X
X
X
X
X
X
X