PIC16LF84-04/P Microchip Technology, PIC16LF84-04/P Datasheet - Page 38

• Manufacturer Part Number: PIC16LF84-04/P
• Description: IC MCU FLASH 1KX14 EE 18DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16LF84-04/P

• Core Size: 8-Bit
• Program Memory Size: 1.75KB (1K x 14)
• Oscillator Type: External
• Core Processor: PIC
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 13
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 68 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 18-DIP (0.300", 7.62mm)
• Controller Family/series: PIC16LF
• No. Of I/o's: 13
• Eeprom Memory Size: 64Byte
• Ram Memory Size: 68Byte
• Cpu Speed: 4MHz
• No. Of: RoHS Compliant
• Processor Series: PIC16LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 68 B
• Maximum Clock Frequency: 10 MHz
• Number Of Programmable I/os: 13
• Number Of Timers: 8
• Operating Supply Voltage: 2 V to 6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC16LC84A-04/P

PIC16C84
8.3
The PIC16C84 differentiates between various kinds
of reset:
• Power-on Reset (POR)
• MCLR reset during normal operation
• MCLR reset during SLEEP
• WDT Reset (during normal operation)
• WDT Wake-up (during SLEEP)
Figure 8-7 shows a simplified block diagram of the on-
chip reset circuit. The electrical specifications state the
pulse width requirements for the MCLR pin.
FIGURE 8-7:
DS30445C-page 38
Note 1: This is a separate oscillator from the
OSC1/
CLKIN
MCLR
V
DD
Reset
RC oscillator of the CLKIN pin.
RC OSC
On-chip
OST/PWRT
V
Module
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
detect
WDT
DD
(1)
rise
OST
PWRT
Time_Out
Reset
10-bit Ripple counter
WDT
10-bit Ripple counter
Power_on_Reset
External
Reset
SLEEP
Some registers are not affected in any reset condition;
their status is unknown on a POR reset and unchanged
in any other reset. Most other registers are reset to a
“reset state” on POR, MCLR or WDT reset during
normal operation and on MCLR reset during SLEEP.
They are not affected by a WDT reset during SLEEP,
since this reset is viewed as the resumption of normal
operation.
Table 8-3 gives a description of reset conditions for the
program counter (PC) and the STATUS register.
Table 8-4 gives a full description of reset states for all
registers.
The TO and PD bits are set or cleared differently in dif-
ferent reset situations (Section 8.7). These bits are
used in software to determine the nature of the reset.
Enable PWRT
Enable OST
See Table 8-5
1997 Microchip Technology Inc.
S
R
Q
Chip_Reset