PIC18F4520-I/P Microchip Technology, PIC18F4520-I/P Datasheet - Page 35

• Manufacturer Part Number: PIC18F4520-I/P
• Description: IC MCU FLASH 16KX16 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4520-I/P

• Program Memory Type: FLASH
• Program Memory Size: 32KB (16K x 16)
• Package / Case: 40-DIP (0.600", 15.24mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1536 B
• Interface Type: MSSP, SPI, I2C, PSP, USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, 53275-917, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 13 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LD444-1001 - DEMO BOARD FOR PICMICRO MCUACICE0206 - ADAPTER MPLABICE 40P 600 MIL
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 5-3:
 2010 Microchip Technology Inc.
CP2
CP1
CP0
CPD
CPB
WRT5
WRT4
WRT3
WRT2
WRT1
WRT0
WRTD
WRTB
WRTC
Note 1:
Bit Name
2:
The BBSIZ bits, BBSIZ<1:0> and BBSIZ<2:1> bits, cannot be changed once any of the following
code-protect bits are enabled: CPB or CP0, WRTB or WRT0, EBTRB or EBTR0.
Not available in PIC18FXX8X and PIC18F2450/4450 devices.
PIC18F2XXX/4XXX FAMILY BIT DESCRIPTIONS (CONTINUED)
Configuration
CONFIG5H
CONFIG5H
CONFIG6H
CONFIG6H
CONFIG6H
CONFIG5L
CONFIG5L
CONFIG5L
CONFIG6L
CONFIG6L
CONFIG6L
CONFIG6L
CONFIG6L
CONFIG6L
Words
Code Protection bit (Block 2 code memory area)
1 = Block 2 is not code-protected
0 = Block 2 is code-protected
Code Protection bit (Block 1 code memory area)
1 = Block 1 is not code-protected
0 = Block 1 is code-protected
Code Protection bit (Block 0 code memory area)
1 = Block 0 is not code-protected
0 = Block 0 is code-protected
Code Protection bit (Data EEPROM)
1 = Data EEPROM is not code-protected
0 = Data EEPROM is code-protected
Code Protection bit (Boot Block memory area)
1 = Boot Block is not code-protected
0 = Boot Block is code-protected
Write Protection bit (Block 5 code memory area) 
(PIC18F2685 and PIC18F4685 devices only)
1 = Block 5 is not write-protected
0 = Block 5 is write-protected
Write Protection bit (Block 4 code memory area) 
(PIC18F2682/2685 and PIC18F4682/4685 devices only)
1 = Block 4 is not write-protected
0 = Block 4 is write-protected
Write Protection bit (Block 3 code memory area)
1 = Block 3 is not write-protected
0 = Block 3 is write-protected
Write Protection bit (Block 2 code memory area)
1 = Block 2 is not write-protected
0 = Block 2 is write-protected
Write Protection bit (Block 1 code memory area)
1 = Block 1 is not write-protected
0 = Block 1 is write-protected
Write Protection bit (Block 0 code memory area)
1 = Block 0 is not write-protected
0 = Block 0 is write-protected
1 = Data EEPROM is not write-protected
0 = Data EEPROM is write-protected
Write Protection bit (Boot Block memory area)
1 = Boot Block is not write-protected
0 = Boot Block is write-protected
Write Protection bit (Configuration registers)
1 = Configuration registers are not write-protected
0 = Configuration registers are write-protected
Write Protection bit (Data EEPROM)
PIC18F2XXX/4XXX FAMILY
Description
DS39622L-page 35