ATMEGA165P-16AU Atmel, ATMEGA165P-16AU Datasheet - Page 304
![IC AVR MCU 16K 16MHZ 64-TQFP](/photos/12/13/121332/313-64-tqfp_sml.jpg)
ATMEGA165P-16AU
Manufacturer Part Number
ATMEGA165P-16AU
Description
IC AVR MCU 16K 16MHZ 64-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA165P-16AU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, USART, USI
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
54
Number Of Timers
3
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Package
64TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Table 26-6.
Note:
26.7
8019K–AVR–11/10
Symbol
R
R
V
REF
AIN
INT
1. Voltage difference between channels.
Parallel Programming Characteristics
Parameter
Internal Voltage Reference
Reference Input Resistance
Analog Input Resistance
ADC Characteristics
Figure 26-4. Parallel Programming Timing, Including some General Timing Requirements
Figure 26-5. Parallel Programming Timing, Loading Sequence with Timing Requirements
Note:
(DATA, XA0/1, BS1, BS2)
PAGEL
XTAL1
DATA
BS1
XA0
XA1
1. The timing requirements shown in
Data & Contol
loading operation.
RDY/BSY
ADDR0 (Low Byte)
LOAD ADDRESS
PAGEL
XTAL1
(LOW BYTE)
WR
Condition
t
t
BVPH
DVXH
(LOW BYTE)
LOAD DATA
DATA (Low Byte)
t
t
XHXL
PHPL
Figure 26-4
t
t
t
t
t
XLXH
XLDX
PLBX
XLWL
PLWL
(that is, t
Min
1.0
t
(HIGH BYTE)
BVWL
LOAD DATA
DATA (High Byte)
DVXH
t
t
WLWH
XLPH
WLRL
LOAD DATA
, t
Typ
100
1.1
XHXL
32
ATmega165P
, and t
t
PLXH
t
WLBX
XLDX
Max
1.2
LOAD ADDRESS
) also apply to
(LOW BYTE)
ADDR1 (Low Byte)
t
WLRH
Units
MΩ
kΩ
(1)
V
304
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