ATMEGA162-16AU Atmel, ATMEGA162-16AU Datasheet - Page 218

IC AVR MCU 16K 16MHZ 5V 44TQFP

ATMEGA162-16AU

Manufacturer Part Number
ATMEGA162-16AU
Description
IC AVR MCU 16K 16MHZ 5V 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA162-16AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
JTAG/SPI/USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
35
Number Of Timers
4
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
Cpu Speed
16 MIPS
Eeprom Memory
512 Bytes
Input Output
35
Interface
JTAG/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin-TQFP
Programmable Memory
16K Bytes
Timers
2-8-bit, 2-16-bit
Voltage, Range
2.7-5.5 V
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
1KB
# I/os (max)
35
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Controller Family/series
AVR MEGA
No. Of I/o's
35
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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RWW – Read-While-
Write Section
NRWW – No Read-
While-Write Section
218
ATmega162/V
If a Boot Loader software update is programming a page inside the RWW section, it is possible
to read code from the Flash, but only code that is located in the NRWW section. During an ongo-
ing programming, the software must ensure that the RWW section never is being read. If the
user software is trying to read code that is located inside the RWW section (i.e., by a
call/jmp/lpm or an interrupt) during programming, the software might end up in an unknown
state. To avoid this, the interrupts should either be disabled or moved to the Boot Loader sec-
tion. The Boot Loader section is always located in the NRWW section. The RWW Section Busy
bit (RWWSB) in the Store Program Memory Control Register (SPMCR) will be read as logical
one as long as the RWW section is blocked for reading. After a programming is completed, the
RWWSB must be cleared by software before reading code located in the RWW section.
“Store Program Memory Control Register – SPMCR” on page 221.
RWWSB.
The code located in the NRWW section can be read when the Boot Loader software is updating
a page in the RWW section. When the Boot Loader code updates the NRWW section, the CPU
is halted during the entire Page Erase or Page Write operation.
Table 88. Read-While-Write Features
Figure 93. Read-While-Write vs. No Read-While-Write
pointer Address During the
Which Section does the Z-
Programming?
NRWW section
RWW section
Z-pointer
Addresses RWW
Section
Code Located in
NRWW Section
Can be Read During
the Operation
Which Section Can be
Programming?
NRWW section
Read During
Read-While-Write
No Read-While-Write
(RWW) Section
(NRWW) Section
None
Is the CPU
Halted?
Yes
No
Z-pointer
Addresses NRWW
Section
CPU is Halted
During the Operation
for details on how to clear
Read-While-
Supported?
Write
Yes
No
2513K–AVR–07/09
See

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