PIC16LF767-I/SO Microchip Technology, PIC16LF767-I/SO Datasheet - Page 272

IC PIC MCU FLASH 8KX14 28SOIC

PIC16LF767-I/SO

Manufacturer Part Number
PIC16LF767-I/SO
Description
IC PIC MCU FLASH 8KX14 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets

Specifications of PIC16LF767-I/SO

Core Size
8-Bit
Program Memory Size
14KB (8K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Number Of I /o
25
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC16LF
No. Of I/o's
25
Ram Memory Size
368Byte
Cpu Speed
20MHz
No. Of Timers
3
Processor Series
PIC16LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
AUSART, CCP, I2C, MSSP, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
25
Number Of Timers
8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Data Rom Size
368 B
Height
2.31 mm
Length
17.87 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Width
7.49 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
PIC16F7X7
Timing Parameter Symbology........................................... 222
Timing Requirements
DS30498C-page 270
Parallel Slave Port Write ............................................. 71
PWM Output ............................................................... 91
Repeated Start Condition.......................................... 122
Reset, Watchdog Timer,
Slave Mode General Call Address Sequence
Slave Synchronization (SPI Mode) ............................. 99
Slow Rise Time (MCLR Tied to V
SPI Master Mode (CKE = 0, SMP = 0) ..................... 229
SPI Master Mode (CKE = 1, SMP = 1) ..................... 229
SPI Mode (Master Mode) ............................................ 98
SPI Mode (Slave Mode with CKE = 0) ...................... 100
SPI Mode (Slave Mode with CKE = 1) ...................... 100
SPI Slave Mode (CKE = 0) ....................................... 230
SPI Slave Mode (CKE = 1) ....................................... 230
Stop Condition Receive or
Switching to SEC_RUN Mode .................................... 42
Synchronous Reception
Synchronous Transmission....................................... 145
Synchronous Transmission
Time-out Sequence on Power-up (MCLR Tied
Time-out Sequence on Power-up (MCLR Tied
Time-out Sequence on Power-up (MCLR Tied
Timer0 and Timer1 External Clock ........................... 226
Timer1 Incrementing Edge.......................................... 79
Transition Between SEC_RUN/RC_RUN
Two-Speed Start-up .................................................. 188
Wake-up from Sleep via Interrupt ............................. 191
XT, HS, LP, EC, EXTRC to
AUSART Synchronous Receive ............................... 234
AUSART Synchronous Transmission ....................... 234
Capture/Compare/PWM
CLKO and I/O ........................................................... 224
External Clock ........................................................... 223
I
I
Parallel Slave Port .................................................... 228
Reset, Watchdog Timer,
SPI Mode .................................................................. 231
Timer0 and Timer1 External Clock ........................... 226
2
2
C Bus Data ............................................................. 233
C Bus Start/Stop Bits.............................................. 232
Oscillator Start-up Timer and
Power-up Timer ................................................ 225
(7 or 10-Bit Address Mode)............................... 116
Through RC Network) ....................................... 183
Transmit Mode .................................................. 126
(Master Mode, SREN)....................................... 147
(Through TXEN)................................................ 145
to V
to V
to V
and Primary Clock............................................... 44
RC_RUN Mode ................................................... 41
(All CCP Modules) ............................................ 227
Oscillator Start-up Timer,
Power-up Timer and Brown-out Reset.............. 225
DD
DD
DD
Through Pull-up Resistor) ..................... 182
Through RC Network): Case 1 .............. 182
Through RC Network): Case 2 .............. 182
DD
TMR1CS Bit........................................................................ 78
TMR1ON Bit ....................................................................... 78
TMR2ON Bit ....................................................................... 86
TOUTPS<3:0> Bits ............................................................. 86
TRISA Register................................................................... 49
TRISB Register................................................................... 56
TRISC Register................................................................... 65
TRISD Register................................................................... 67
TRISE Register................................................................... 68
Two-Speed Clock Start-up Mode...................................... 188
Two-Speed Start-up.......................................................... 169
TXSTA Register
V
Voltage Reference Specifications..................................... 220
W
Wake-up from Sleep ................................................. 169, 190
Wake-up Using Interrupts ................................................. 191
Watchdog Timer (WDT)............................................ 169, 186
WCOL ....................................................... 121, 122, 123, 126
WCOL Status Flag.................................... 121, 122, 123, 126
WWW, On-Line Support ....................................................... 4
IBF Bit ......................................................................... 69
IBOV Bit ...................................................................... 69
PSPMODE Bit....................................................... 67, 68
BRGH Bit .................................................................. 133
CSRC Bit .................................................................. 133
TRMT Bit................................................................... 133
TX9 Bit ...................................................................... 133
TX9D Bit ................................................................... 133
TXEN Bit ................................................................... 133
Interrupts .......................................................... 179, 180
WDT Reset ............................................................... 180
Associated Registers ................................................ 187
WDT Reset, Normal Operation................. 172, 179, 180
WDT Reset, Sleep .................................... 172, 179, 180
 2004 Microchip Technology Inc.

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