PIC16F877A-I/P Microchip Technology, PIC16F877A-I/P Datasheet - Page 29

• Manufacturer Part Number: PIC16F877A-I/P
• Description: IC MCU FLASH 8KX14 EE 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F877A-I/P

• Program Memory Type: FLASH
• Program Memory Size: 14KB (8K x 14)
• Package / Case: 40-DIP (0.600", 15.24mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 33
• Eeprom Size: 256 x 8
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 368 B
• Interface Type: CCP/I2C/MSSP/SPI/USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 444-1001 - DEMO BOARD FOR PICMICRO MCU
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: PIC16F877AI/P

2.2.2.6
The PIE2 register contains the individual enable bits for
the CCP2 peripheral interrupt, the SSP bus collision
interrupt, EEPROM write operation interrupt and the
comparator interrupt.
REGISTER 2-6:
 2003 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-1
bit 0
PIE2 Register
PIE2 REGISTER (ADDRESS 8Dh)
bit 7
Unimplemented: Read as ‘0’
CMIE: Comparator Interrupt Enable bit
1 = Enables the comparator interrupt
0 = Disable the comparator interrupt
Unimplemented: Read as ‘0’
EEIE: EEPROM Write Operation Interrupt Enable bit
1 = Enable EEPROM write interrupt
0 = Disable EEPROM write interrupt
BCLIE: Bus Collision Interrupt Enable bit
1 = Enable bus collision interrupt
0 = Disable bus collision interrupt
Unimplemented: Read as ‘0’
CCP2IE: CCP2 Interrupt Enable bit
1 = Enables the CCP2 interrupt
0 = Disables the CCP2 interrupt
Legend:
R = Readable bit
- n = Value at POR
U-0
—
R/W-0
CMIE
U-0
—
W = Writable bit
‘1’ = Bit is set
R/W-0
EEIE
Note:
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
BCLIE
R/W-0
Bit PEIE (INTCON<6>) must be set to
enable any peripheral interrupt.
PIC16F87XA
U-0
—
x = Bit is unknown
U-0
—
DS39582B-page 27
CCP2IE
R/W-0
bit 0