DSPIC30F4013-20I/P Microchip Technology, DSPIC30F4013-20I/P Datasheet - Page 8

IC DSPIC MCU/DSP 48K 40DIP

DSPIC30F4013-20I/P

Manufacturer Part Number
DSPIC30F4013-20I/P
Description
IC DSPIC MCU/DSP 48K 40DIP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F4013-20I/P

Program Memory Type
FLASH
Program Memory Size
48KB (16K x 24)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, I²S, POR, PWM, WDT
Number Of I /o
30
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 13x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC30F
Core
dsPIC
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
30
Data Ram Size
2 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300018, DM330011
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC30F003 - MODULE SOCKET DSPIC30F 40DIPACICE0206 - ADAPTER MPLABICE 40P 600 MIL
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
DSPIC30F4013-20IP

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dsPIC30F3014/4013
14. Module: INT0, ADC and Sleep Mode
15. Module: 8x PLL Mode
16. Module: Low-Voltage Detect (LVD)
DS80228K-page 8
ADC event triggers from the INT0 pin will not
wake-up the device from Sleep mode if the SMPI
bits are non-zero. This means that if the ADC is
configured to generate an interrupt after a certain
number of INT0 triggered conversions, the ADC
conversions will not be triggered and the device
will remain in Sleep. The ADC will perform
conversions and wake-up the device only if it is
configured to generate an interrupt after each INT0
triggered conversion (SMPI<3:0> = 0000).
Work around
None. If ADC event trigger from the INT0 pin is
required, initialize SMPI<3:0> to ‘0000’ (interrupt
on every conversion).
If 8x PLL mode is used, the input frequency range
is 5 MHz-10 MHz instead of 4 MHz-10 MHz.
Work around
None. If 8x PLL is used, make sure the input
crystal or clock frequency is 5 MHz or greater.
When using the external Low-Voltage Detect
(LVD)
independent of the voltage.
Work around
The LVD module works as an internal reference
source only.
module,
interrupts
are
generated
17. Module: Sleep Mode
Execution of the Sleep instruction (PWRSAV #0)
may cause incorrect program operation after the
device wakes up from Sleep. The current
consumption during Sleep may also increase
beyond the specifications listed in the device data
sheet.
Work arounds
To avoid this issue, any of the following three work
arounds can be implemented, depending on the
application requirements.
Work around 1:
Ensure that the PWRSAV #0 instruction is located
at the end of the last row of program Flash memory
available on the target device and fill the
remainder of the row with NOP instructions.
This can be accomplished by replacing all
occurrences of the PWRSAV #0 instruction with a
function call to a suitably aligned subroutine. The
address( ) attribute provided by the MPLAB
ASM30 assembler can be utilized to correctly align
the instructions in the subroutine. For an
application written in C, the function call would be
GotoSleep( ), while for an assembly language
application,
CALL _GotoSleep.
The address error trap service routine software
can then replace the invalid return address saved
on the stack with the address of the instruction
immediately
GotoSleep( ) function call. This ensures that
the device continues executing the correct code
sequence after waking up from Sleep mode.
Example 8
described above, as it would apply to a
dsPIC30F3014 device.
demonstrates
the
following
© 2008 Microchip Technology Inc.
function
the
the
_GotoSleep
call
work
would
around
be
or

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