PIC24HJ128GP210-I/PT Microchip Technology, PIC24HJ128GP210-I/PT Datasheet - Page 81
![IC PIC MCU FLASH 64KX16 100TQFP](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
PIC24HJ128GP210-I/PT
Manufacturer Part Number
PIC24HJ128GP210-I/PT
Description
IC PIC MCU FLASH 64KX16 100TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ64GP206-IPT.pdf
(292 pages)
3.PIC24HJ64GP206-IPT.pdf
(8 pages)
4.PIC24HJ64GP206-IPT.pdf
(20 pages)
5.PIC24HJ64GP206-IPT.pdf
(26 pages)
6.PIC24HJ128GP210-IPT.pdf
(58 pages)
Specifications of PIC24HJ128GP210-I/PT
Core Size
16-Bit
Program Memory Size
128KB (43K x 24)
Oscillator Type
Internal
Core Processor
PIC
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b/12b
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFQFP
Controller Family/series
PIC24
No. Of I/o's
85
Ram Memory Size
8KB
Cpu Speed
32MHz
No. Of Timers
9
No. Of Pwm
RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDAC164333 - MODULE SKT FOR PM3 100QFPDM300024 - KIT DEMO DSPICDEM 1.1MA240012 - MODULE PLUG-IN PIC24H 100QFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24HJ128GP210-I/PT
Manufacturer:
MICROCHIP
Quantity:
12 000
Company:
Part Number:
PIC24HJ128GP210-I/PT
Manufacturer:
MICROCHIP
Quantity:
255
Company:
Part Number:
PIC24HJ128GP210-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC24HJ128GP210-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Revision G (March 2009) (Continued)
• Removed PROGW and renamed QBLANK to
• Updated the flowchart in
• Updated the second paragraph in
• Changed the CFGB calculation for
• Removed Note 2 in
• Updated the Erased Value and Value with
• Removed COE and BKBUG Configuration Bit
• Added PLLKEN to FWDT in
• Added ALTQIO and ALTSS1 to FPOR in
© 2010 Microchip Technology Inc.
QBLANKEX in the Command Set Summary, and
added the following commands (see
- ERASEB
- ERASEP
- CRCP
“Confirming the Presence of the Programming
Executive”
dsPIC33FJ06GS101/102/202 and
dsPIC33FJ16GS402/404/502/504 devices to:
+ (FPOR & 0x0F)
0xAAAAAA at 0x0 and Last Code Address
columns in Table 3-2 for the following devices:
- dsPIC33FJ64GP202
- dsPIC33FJ64GP204
- dsPIC33FJ64GP802
- dsPIC33FJ64GP804
- dsPIC33FJ64MC202
- dsPIC33FJ64MC204
- dsPIC33FJ64MC802
- dsPIC33FJ64MC804
- PIC24HJ64GP202
- PIC24HJ64GP204
- PIC24HJ64GP502
- PIC24HJ64GP504
Descriptions in
Table 3-3
Table 3-2
and Table 3-3
Table 3-2
Section 3.6.1 “Overview”
Figure 3-2
and Table 3-3
Table 3-2
Section 3.2
Table
and
3-1):
• Removed Notes for the following Configuration Bit
• Added Note 6 and Note 7 to Table 3-3
• Added Note 1 to
• Added Note to the beginning of
• Updated the third paragraph in
• Changed the clock speed to be provided by the
• Added
• Removed FUID2 and FUID3 from
• Added new Default Configuration Register Value
• Updated description for FWDT and added Note 1
• Added seven new op code instructions to Step 3
• Updated Step 4 in
• Added new columns (Application ID and JTAG ID)
• Added JTAG Type registers (see
• The following updates were made to
Descriptions in
- RBS
- RSS (removed Note 1)
- SSS
- SWRP
- IOL1WAY
- ALTI2C
- BOREN
Programming Executive”
“Communication Interface and Protocol”
clarify the clock response time
programmer from 7.35 MHz to 1.85 MHz in
Section 4.1.2 “SPI Rate”
(formerly Figure 5-2)
table in support of dsPIC33FJ32GSX06/60X/610
and dsPIC33FJ64GSX06/60X/610 devices (see
Table
in
in
pointer increment
to
Register 7-2
- Updated parameters P1A and P1B and
- Updated characteristic for parameter P16
- Updated minimum value and units for
- Added new parameter P21
added additional characteristics and values
parameter P18
Table 5-10
Table 6-1
Table 7-1
5-9)
Figure 5-2
and
Table
Figure 3-5
Register
and updated
Table 6-1
3-2:
7-3)
to reflect the TBLPG
Section 4.1.1
Figure 5-3
Section 4.0 “The
Register
DS70152H-page 81
Table 5-6
Table 8-1
7-1,
to