PIC18F4525-I/ML Microchip Technology, PIC18F4525-I/ML Datasheet - Page 28
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PIC18F4525-I/ML
Manufacturer Part Number
PIC18F4525-I/ML
Description
IC MCU FLASH 24KX16 44QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(46 pages)
2.PIC18F2525-ISO.pdf
(412 pages)
3.PIC18F2525-ISO.pdf
(18 pages)
4.PIC18F2525-ISO.pdf
(18 pages)
5.PIC18F2525-ISO.pdf
(6 pages)
6.PIC18F2525-ISO.pdf
(6 pages)
Specifications of PIC18F4525-I/ML
Core Size
8-Bit
Program Memory Size
48KB (24K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Controller Family/series
PIC18
No. Of I/o's
36
Eeprom Memory Size
1024Byte
Ram Memory Size
3968Byte
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3986 B
Interface Type
SPI, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
36
Number Of Timers
1 x 8
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, 53275-917, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
13 bit
Package
44QFN EP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNI3DB18F4620 - BOARD DAUGHTER ICEPIC3444-1001 - DEMO BOARD FOR PICMICRO MCU
Lead Free Status / Rohs Status
Details
PIC18F2XXX/4XXX FAMILY
5.0
The PIC18F2XXX/4XXX family devices have several
Configuration Words. These bits can be set or cleared to
select various device configurations. All other memory
areas should be programmed and verified prior to setting
the Configuration Words. These bits may be read out
normally, even after read or code protection. See
Table 5-1
and
5.1
A user may store identification information (ID) in eight
ID locations, mapped in 200000h:200007h. It is recom-
mended that the most significant nibble of each ID be
Fh. In doing so, if the user code inadvertently tries to
execute from the ID space, the ID data will execute as
a NOP.
DS39622L-page 28
Table 5-3
CONFIGURATION WORD
ID Locations
for a list of Configuration bits and Device IDs,
for the Configuration bit descriptions.
values. In such cases, the Most Significant bit of the
5.2
The Device ID Word for the PIC18F2XXX/4XXX family
devices is located at 3FFFFEh:3FFFFFh. These bits
may be used by the programmer to identify what device
type is being programmed and read out normally, even
after code or read protection.
In some cases, devices may share the same DEVID
device revision, REV4 (DEVID1<4>), will need to be
examined to completely determine the device being
accessed.
See
FIGURE 5-1:
Table 5-2
Device ID Word
for a complete list of Device ID values.
Set TBLPTR = 3FFFFE
READ DEVICE ID WORD FLOW
with Post-Increment
with Post-Increment
Read Low Byte
Read High Byte
2010 Microchip Technology Inc.
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