PIC16F877A-I/ML Microchip Technology, PIC16F877A-I/ML Datasheet - Page 196

• Manufacturer Part Number: PIC16F877A-I/ML
• Description: IC MCU FLASH 8KX14 A/D 44QFN
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F877A-I/ML

• Core Size: 8-Bit
• Program Memory Size: 14KB (8K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Controller Family/series: PIC16F
• No. Of I/o's: 33
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 368Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 368 B
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN444-1001 - DEMO BOARD FOR PICMICRO MCU
• Lead Free Status / Rohs Status: Details

PICmicro MID-RANGE MCU FAMILY
13.1
DS31013A-page 13-2
Introduction
Timer2 is an 8-bit timer with a prescaler, a postscaler, and a period register. Using the prescaler
and postscaler at their maximum settings, the overflow time is the same as a 16-bit timer.
Timer2 is the PWM time-base when the CCP module(s) is used in the PWM mode.
Figure 13-1
the TMR2 register matched the PR2 register. This can be useful in reducing the overhead of the
interrupt service routine on the CPU performance.
Figure 13-1: Timer2 Block Diagram
Note:
F
OSC
shows a block diagram of Timer2. The postscaler counts the number of times that
TMR2 register output can be software selected by the SSP Module as a baud clock.
/4
T2CKPS1:T2CKPS0
1:1, 1:4, 1:16
Prescaler
2
Comparator
TMR2 reg
PR2 reg
EQ
Reset
TOUTPS3:TOUTPS0
TMR2
output
1:1
Postscaler
to
(1)
1997 Microchip Technology Inc.
1:16
4
Sets flag
bit TMR2IF