DSPIC33FJ256GP510-I/PF Microchip Technology, DSPIC33FJ256GP510-I/PF Datasheet - Page 60

• Manufacturer Part Number: DSPIC33FJ256GP510-I/PF
• Description: IC DSPIC MCU/DSP 256K 100TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ256GP510-I/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 32x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Core Frequency: 40MHz
• Core Supply Voltage: 3.3V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 85
• Flash Memory Size: 256KB
• Supply Voltage Range: 3V To 3.6V
• Package: 100TQFP
• Device Core: dsPIC
• Family Name: dSPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 85
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 32-chx10-bit|32-chx12-bit
• Number Of Timers: 9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1001 - DSPIC33 BREAKOUT BOARDDM300024 - KIT DEMO DSPICDEM 1.1DV164033 - KIT START EXPLORER 16 MPLAB ICD2MA330012 - MODULE DSPIC33 100P TO 84QFPMA330011 - MODULE DSPIC33 100P TO 100QFPDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164323 - MODULE SKT FOR 100TQFP
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

TABLE 8-1:
DS70152H-page 60
Standard Operating Conditions
Operating Temperature: –40ºC-85ºC. Programming at 25ºC is recommended.
Param
P9b
P10
P11
P12
P13
P14
P15
P16
P17
P18
P19
P20
P21
No.
Note 1: V
T
T
T
T
T
T
T
T
T
T
T
T
T
Symbol
2: Time depends on the FRC accuracy and the value of the FRC Oscillator tuning register. Refer to
DLY
DLY
DLY
DLY
DLY
R
VALID
DLY
HLD
KEY
KEY
DLY
MCLRH
±0.3V of V
“Electrical Characteristics” section in the specific device data sheet.
5
6
7
8
9
10 Delay between Last PGCx ↓ and MCLR ↓
3
1
2
11 Maximum Wait Time for Configuration
DD
must also be supplied to the AV
Delay between PGDx ↓ by Programming
Executive to PGDx Released by
Programming Executive
PGCx Low Time After Programming
Bulk Erase Time
Page Erase Time
Row Programming Time
MCLR Rise Time to Enter ICSP mode
Data Out Valid from PGCx ↑
MCLR ↓ to V
Delay from First MCLR ↓ to First PGCx ↑
for Key Sequence on PGDx
Delay from Last PGCx ↓ for Key Sequence
on PGDx to Second MCLR ↑
Register Programming
MCLR High Time
AC/DC CHARACTERISTICS AND TIMING REQUIREMENTS (CONTINUED)
DD
and V
DD
Characteristic
SS
↓
, respectively.
DD
pins during programming. AV
19.5
1.28
Min
400
330
15
10
25
—
—
—
—
0
1
Max
100
500
1.0
23
25
—
—
—
—
—
—
—
—
DD
Units
and AV
ms
ms
ms
ms
μs
ns
μs
ns
ns
μs
ns
μs
s
© 2010 Microchip Technology Inc.
SS
should always be within
Conditions
See Note 2
See Note 2
See Note 2
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