PIC32MX460F512L-80I/PT Microchip Technology, PIC32MX460F512L-80I/PT Datasheet - Page 30

IC PIC MCU FLASH 512K 100-TQFP

PIC32MX460F512L-80I/PT

Manufacturer Part Number
PIC32MX460F512L-80I/PT
Description
IC PIC MCU FLASH 512K 100-TQFP
Manufacturer
Microchip Technology
Series
PIC® 32MXr

Specifications of PIC32MX460F512L-80I/PT

Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
100-TFQFP
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC32MX4xx
Core
MIPS
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
I2C , SPI , UART
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
85
Number Of Timers
5 x 16 bit, 1 x 32 bit
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Controller Family/series
PIC32
No. Of I/o's
85
Ram Memory Size
32KB
Cpu Speed
80MHz
No. Of Timers
6
Embedded Interface Type
EUART, I2C, PSP, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1000 - PIC32 BREAKOUT BOARDAC244003 - TEST BD MPLAB REAL ICE LOOPBACKDM320003 - BOARD DEMO USB PIC32 OTGAC244006 - KIT MPLAB REAL ICE TRACEAC164333 - MODULE SKT FOR PM3 100QFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC32MX460F512L-80I/PT
Manufacturer:
VISHAY
Quantity:
3 200
Part Number:
PIC32MX460F512L-80I/PT
Manufacturer:
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Quantity:
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Part Number:
PIC32MX460F512L-80I/PT
0
PIC32MX
16.2.5
The PROGRAM command instructs the PE to program
Flash memory, including Configuration Words, starting
from the 32-bit address specified in the Addr_Low and
Addr_High fields. The address must be aligned to a
512-byte boundary (aligned to Flash row size). Also,
the length must be a multiple of 512 bytes (multiple of
the Flash row size).
FIGURE 16-7:
TABLE 16-6:
There are three programming scenarios:
1.
2.
3.
When the data length is equal to 512 bytes, the PE
receives the 512-byte block of data from the probe and
immediately sends the response for this command
back to the probe.
DS61145G-page 30
Opcode
Addr_Low
Addr_High
Length_Low
Length_High
Data_Low_N
Data_High_N
31
15
31
15
31
15
31
15
The length of the data to be programmed is 512
bytes.
The length of the data to be programmed is
1024 bytes.
The length of the data to be programmed is
larger than 1024 bytes.
Field
PROGRAM COMMAND
0x2
Low 16 bits of 32-bit destination
address
High 16 bits of 32-bit destination
address
Low 16 bits of Length
High 16 bits Length
Low 16 bits data word 2 through N
High 16 bits data word 2 through N
PROGRAM FORMAT
Data_High_N
Data_Low_N
Length_High
Length_Low
Addr_High
Addr_Low
PROGRAM COMMAND
Not Used
Opcode
Description
16
16
16
16
0
0
0
0
When the data length is equal to 1024 bytes, the PE
receives the first two 512-byte blocks of data from the
probe sequentially. The PE sends the response with
the status of the write operation for the first 512-byte
block back to the probe, followed immediately by the
status of the write operation for the second 512-byte
block.
If the data to be programmed is larger than 1024 bytes,
the PE receives the first two 512-byte blocks of data
from the probe sequentially. The PE sends the
response for the first 512-byte block of data back to the
probe. The PE receives the third 512-byte block probe
and sends the response for the second 512-bye block
back to the probe. Successive blocks from the probe
and subsequent responses to the probe are received
and sent same way. After receiving the last 512-byte
block from the probe, the PE sends the response for
the second-to-last block to the probe, followed by the
response for the last block.
If the PE encounters an error in programming any of
the blocks, it sends a failure status to the probe. On
receiving the failure status, the probe must stop send-
ing data. The PE does not receive any other data for
this command from the probe. The process is
illustrated in Figure 16-9.
The response for this command is a little different than
the response for other commands. The 16 MSbs of the
response contain the 16 LSbs of the destination
address, where the last block is programmed. This
helps the probe and the PE maintain proper
synchronization of sending, and receiving, data and
responses.
Expected Response (1 word):
FIGURE 16-8:
31
15
LSB 16 bits of the destination address of last block
Note:
If the PROGRAM command fails, the
programmer should read the failing row
using the READ command from the Flash
memory. Next, the programmer should
compare the row received from Flash
memory to its local copy, word-by-word, to
determine the address where Flash
programming fails.
Return Code
PROGRAM RESPONSE
© 2010 Microchip Technology Inc.
16
0

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