PIC16C74A-20/L Microchip Technology, PIC16C74A-20/L Datasheet - Page 34

• Manufacturer Part Number: PIC16C74A-20/L
• Description: IC MCU OTP 4KX14 A/D PWM 44PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C74A-20/L

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Type: OTP
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Data Converters: A/D 8x8b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-PLCC
• Controller Family/series: PIC16C
• No. Of I/o's: 33
• Ram Memory Size: 192Byte
• Cpu Speed: 10MHz
• No. Of Timers: 3
• Interface: I2C, SPI, USART
• Embedded Interface Type: I2C, SPI, USART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164309 - MODULE SKT FOR PM3 44PLCC444-1001 - DEMO BOARD FOR PICMICRO MCUDVA16XL441 - ADAPTER DEVICE ICE 44PLCCDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC16C7X
FIGURE 4-11: PIE1 REGISTER PIC16C73/73A/74/74A/76/77 (ADDRESS 8Ch)
DS30390E-page 34
bit7
bit 7:
bit 6:
bit 5:
bit 4:
bit 3:
bit 2:
bit 1:
bit 0:
Note 1: PIC16C73/73A/76 devices do not have a Parallel Slave Port implemented, this bit location is reserved
PSPIE
R/W-0
(1)
PSPIE
1 = Enables the PSP read/write interrupt
0 = Disables the PSP read/write interrupt
ADIE: A/D Converter Interrupt Enable bit
1 = Enables the A/D interrupt
0 = Disables the A/D interrupt
RCIE: USART Receive Interrupt Enable bit
1 = Enables the USART receive interrupt
0 = Disables the USART receive interrupt
TXIE: USART Transmit Interrupt Enable bit
1 = Enables the USART transmit interrupt
0 = Disables the USART transmit interrupt
SSPIE: Synchronous Serial Port Interrupt Enable bit
1 = Enables the SSP interrupt
0 = Disables the SSP interrupt
CCP1IE: CCP1 Interrupt Enable bit
1 = Enables the CCP1 interrupt
0 = Disables the CCP1 interrupt
TMR2IE: TMR2 to PR2 Match Interrupt Enable bit
1 = Enables the TMR2 to PR2 match interrupt
0 = Disables the TMR2 to PR2 match interrupt
TMR1IE: TMR1 Overflow Interrupt Enable bit
1 = Enables the TMR1 overflow interrupt
0 = Disables the TMR1 overflow interrupt
on these devices, always maintain this bit clear.
R/W-0
ADIE
(1)
: Parallel Slave Port Read/Write Interrupt Enable bit
R/W-0
RCIE
R/W-0
TXIE
SSPIE
R/W-0
CCP1IE
R/W-0
TMR2IE
R/W-0
TMR1IE
R/W-0
bit0
R = Readable bit
W = Writable bit
U = Unimplemented bit,
- n = Value at POR reset
1997 Microchip Technology Inc.
read as ‘0’