DSPIC30F6012A-30I/PT Microchip Technology, DSPIC30F6012A-30I/PT Datasheet - Page 227

• Manufacturer Part Number: DSPIC30F6012A-30I/PT
• Description: IC DSPIC MCU/DSP 144K 64TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6012A-30I/PT

• Program Memory Type: FLASH
• Program Memory Size: 144KB (48K x 24)
• Package / Case: 64-TFQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 30 MHz
• Number Of Programmable I/os: 52
• Data Ram Size: 8 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM330011
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPAC30F008 - MODULE SKT FOR DSPIC30F 64TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: DSPIC30F6012A30IP

I/O Ports .............................................................................. 61
I
I
I
I
I
I
Idle Current (I
In-Circuit Debugger (ICD 2) .............................................. 159
In-Circuit Serial Programming (ICSP) ......................... 51, 143
Initialization Condition for RCON Register Case 1 ........... 156
Initialization Condition for RCON Register Case 2 ........... 156
Input Capture (CAPX) Timing Characteristics .................. 193
Input Capture Module ......................................................... 81
Input Capture Operation During Sleep and Idle Modes ...... 82
Input Capture Timing Requirements ................................. 193
Input Change Notification Module ....................................... 66
Instruction Addressing Modes............................................. 39
© 2011 Microchip Technology Inc.
2
2
2
2
2
2
C 10-bit Slave Mode Operation ........................................ 97
C 7-bit Slave Mode Operation .......................................... 97
C Master Mode Operation ................................................ 99
C Master Mode Support ................................................... 99
C Module .......................................................................... 95
S Mode Operation .......................................................... 131
Parallel (PIO) .............................................................. 61
Reception.................................................................... 98
Transmission............................................................... 98
Reception.................................................................... 97
Transmission............................................................... 97
Baud Rate Generator................................................ 100
Clock Arbitration........................................................ 100
Multi-Master Communication, Bus Collision and Bus Ar-
Reception.................................................................... 99
Transmission............................................................... 99
Addresses ................................................................... 97
Bus Data Timing Characteristics
Bus Data Timing Requirements
Bus Start/Stop Bits Timing Characteristics
General Call Address Support .................................... 99
Interrupts..................................................................... 99
IPMI Support ............................................................... 99
Operating Function Description .................................. 95
Operation During CPU Sleep and Idle Modes .......... 100
Pin Configuration ........................................................ 95
Programmer’s Model................................................... 95
Register Map............................................................. 101
Registers..................................................................... 95
Slope Control .............................................................. 99
Software Controlled Clock Stretching (STREN = 1).... 98
Various Modes ............................................................ 95
Data Justification....................................................... 131
Frame and Data Word Length Selection................... 131
Interrupts..................................................................... 82
Register Map............................................................... 83
CPU Idle Mode............................................................ 82
CPU Sleep Mode ........................................................ 82
Register Map for dsPIC30F6011A/6012 A (Bits 7-0) .. 66
Register Map for dsPIC30F6011A/6012A (Bits 15-8) . 66
Register Map for dsPIC30F6013A/6014A (Bits 15-8) . 66
Register Map for dsPIC30F6013A/6014A (Bits 7-0) ... 66
File Register Instructions ............................................ 39
Fundamental Modes Supported.................................. 39
MAC Instructions......................................................... 40
MCU Instructions ........................................................ 39
bitration ............................................................. 100
Master Mode ..................................................... 203
Slave Mode ....................................................... 205
Master Mode ..................................................... 204
Slave Mode ....................................................... 206
Master Mode ..................................................... 203
Slave Mode ....................................................... 205
IDLE
) ............................................................ 177
dsPIC30F6011A/6012A/6013A/6014A
Instruction Set
Internet Address ............................................................... 227
Interrupt Controller
Interrupt Priority .................................................................. 46
Interrupt Sequence ............................................................. 48
Interrupts ............................................................................ 45
L
Load Conditions................................................................ 183
Low Voltage Detect (LVD) ................................................ 157
Low-Voltage Detect Characteristics.................................. 180
LVDL Characteristics ........................................................ 181
M
Memory Organization ......................................................... 25
Microchip Internet Web Site.............................................. 227
Modes of Operation
Module ................................................................................ 95
Modulo Addressing ............................................................. 40
MPLAB ASM30 Assembler, Linker, Librarian ................... 170
MPLAB Integrated Development Environment Software.. 169
MPLAB PM3 Device Programmer .................................... 172
MPLAB REAL ICE In-Circuit Emulator System ................ 171
MPLINK Object Linker/MPLIB Object Librarian ................ 170
N
NVM
O
OC/PWM Module Timing Characteristics ......................... 194
Operating Current (I
Oscillator
Oscillator Configurations................................................... 146
Oscillator Selection ........................................................... 143
Oscillator Start-up Timer
Output Compare Interrupts ................................................. 88
Move and Accumulator Instructions ........................... 40
Other Instructions ....................................................... 40
Overview................................................................... 164
Summary .................................................................. 161
Register Map .............................................................. 50
Interrupt Stack Frame................................................. 49
Core Register Map ..................................................... 37
Disable...................................................................... 113
Initialization............................................................... 113
Listen All Messages.................................................. 113
Listen Only................................................................ 113
Loopback .................................................................. 113
Normal Operation ..................................................... 113
Applicability................................................................. 42
Operation Example..................................................... 41
Start and End Address ............................................... 41
W Address Register Selection.................................... 41
Register Map .............................................................. 55
Control Registers...................................................... 149
Operating Modes (Table).......................................... 144
System Overview...................................................... 143
Fail-Safe Clock Monitor ............................................ 148
Fast RC (FRC).......................................................... 147
Initial Clock Source Selection ................................... 146
Low-Power RC (LPRC) ............................................ 148
LP Oscillator Control................................................. 147
Phase Locked Loop (PLL) ........................................ 147
Start-up Timer (OST)................................................ 147
Timing Characteristics .............................................. 188
Timing Requirements ............................................... 189
DD
) .................................................... 176
DS70143E-page 227