PIC12CE673/JW Microchip Technology, PIC12CE673/JW Datasheet - Page 238

IC MCU EPROM 1KX14 A/D&EE 8CDIP

PIC12CE673/JW

Manufacturer Part Number
PIC12CE673/JW
Description
IC MCU EPROM 1KX14 A/D&EE 8CDIP
Manufacturer
Microchip Technology
Series
PIC® 12Cr

Specifications of PIC12CE673/JW

Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
EPROM, UV
Eeprom Size
16 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-CDIP (0.300", 7.62mm) Window
For Use With
ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMINGAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Connectivity
-
PICmicro MID-RANGE MCU FAMILY
15.4.1
DS31015A-page 15-18
Slave Mode
In slave mode, the SCL and SDA pins must be configured as inputs (TRIS set). The SSP module
will override the input state with the output data when required (slave-transmitter).
When an address is matched or the data transfer after an address match is received, the hard-
ware automatically will generate the acknowledge (ACK) pulse, and then load the SSPBUF reg-
ister with the received value currently in the SSPSR register.
There are certain conditions that will cause the SSP module not to give this ACK pulse. These
are if either (or both):
a)
b)
In this case, the SSPSR register value is not loaded into the SSPBUF, but the SSPIF and SSPOV
bits are set.
tus of bits BF and SSPOV. The shaded cells show the condition where user software did not prop-
erly clear the overflow condition. Flag bit BF is cleared by reading the SSPBUF register while bit
SSPOV is cleared through software.
The SCL clock input must have a minimum high and low time for proper operation. The high and
low times of the I
Device Data Sheet electrical specifications
The buffer full bit, BF (SSPSTAT<0>), was set before the message completed.
The overflow bit, SSPOV (SSPCON<6>), was set before the message completed.
Table 15-2
2
C specification as well as the requirement of the SSP module is shown in
shows what happens when a data transfer byte is received, given the sta-
parameters 100
and 101.
1997 Microchip Technology Inc.

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