AT91RM9200-QU-002 Atmel, AT91RM9200-QU-002 Datasheet - Page 22
![IC ARM9 MCU 208 PQFP](/photos/6/73/67311/313-208-pqfp_sml.jpg)
AT91RM9200-QU-002
Manufacturer Part Number
AT91RM9200-QU-002
Description
IC ARM9 MCU 208 PQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheets
1.AT91RM9200-EK.pdf
(41 pages)
2.AT91RM9200-QU-002.pdf
(701 pages)
3.AT91RM9200-QU-002.pdf
(38 pages)
Specifications of AT91RM9200-QU-002
Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
POR
Number Of I /o
122
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
208-MQFP, 208-PQFP
Processor Series
AT91Rx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
2-Wire, EBI, I2S, SPI, UART, USART
Maximum Clock Frequency
180 MHz
Number Of Programmable I/os
122
Number Of Timers
10 bit
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91RM9200-EK
Minimum Operating Temperature
- 40 C
Eeprom Memory
0 Bytes
Input Output
122
Interface
EBI/EMI, UART/USART
Ios
122
Memory Type
ROM
Number Of Bits
32
Package Type
208-pin PQFP
Programmable Memory
128K Bytes
Timers
3-16-bit
Voltage, Range
1.65-1.95 V
Cpu Family
91R
Device Core
ARM920T
Device Core Size
32b
Frequency (max)
180MHz
Total Internal Ram Size
16KB
# I/os (max)
122
Number Of Timers - General Purpose
6
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
1.95/3.6V
Operating Supply Voltage (min)
1.65/3V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
208
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91RM9200-QU-002
Manufacturer:
COSMO
Quantity:
12 000
Company:
Part Number:
AT91RM9200-QU-002
Manufacturer:
Atmel
Quantity:
1 680
Company:
Part Number:
AT91RM9200-QU-002
Manufacturer:
ATMEL
Quantity:
2 350
Part Number:
AT91RM9200-QU-002
Manufacturer:
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20 000
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Manufacturer:
Atmel
Quantity:
3
10.3
22
Peripheral Multiplexing on PIO Lines
AT91RM9200
Table 10-1.
The AT91RM9200 features four PIO controllers:
Each PIO Controller controls up to 32 lines. Each line can be assigned to one of two peripheral
functions, A or B. The tables in the following paragraphs define how the I/O lines of the peripher-
als A and B are multiplexed on the PIO Controllers A, B, C and D. The two columns “Function”
and “Comments” have been inserted for the user’s own comments; they may be used to track
how pins are defined in an application.
The column “Reset State” indicates whether the PIO line resets in I/O mode or in peripheral
mode. If equal to “I/O”, the PIO line resets in input with the pull-up enabled so that the device is
maintained in a static state as soon as the NRST pin is asserted. As a result, the bit correspond-
ing to the PIO line in the register PIO_PSR (Peripheral Status Register) resets low.
If a signal name is in the “Reset State” column, the PIO line is assigned to this function and the
corresponding bit in PIO_PSR resets high. This is the case for pins controlling memories, either
address lines or chip selects, and that require the pin to be driven as soon as NRST raises. Note
that the pull-up resistor is also enabled in this case.
See
page
Peripheral
ID
26
27
28
29
30
31
• PIOA and PIOB, multiplexing I/O lines of the peripheral set
• PIOC, multiplexing the data bus bits 16 to 31 and several External Bus Interface control
• PIOD, available in the 256-ball BGA package option only, multiplexing outputs of the
signals. Using PIOC pins increases the number of general-purpose I/O lines available but
prevents 32-bit memory access
peripheral set and the ETM port
Table 10-2 on page
26.
Peripheral Identifiers (Continued)
Peripheral
Mnemonic
AIC
AIC
AIC
AIC
AIC
AIC
23,
Table 10-3 on page
Peripheral
Name
Advanced Interrupt Controller
Advanced Interrupt Controller
Advanced Interrupt Controller
Advanced Interrupt Controller
Advanced Interrupt Controller
Advanced Interrupt Controller
24,
Table 10-4 on page 25
1768KS–ATARM–29-Sep-06
and
External
Interrupt
IRQ1
IRQ2
IRQ3
IRQ4
IRQ5
IRQ6
Table 10-5 on